XILINX MicroBlaze Soft Processor Core System User Guide

: June 6, 2024
: XILINX

Table of Contents

INTRODUCTION
BEFORE YOU BEGIN
HARDWARE DEVELOPMENT
SOFTWARE DEVELOPMENT
SOFTWARE DEVELOPMENT (cont’d)
FAQs and ADDITIONAL RESOURCES
Resources
Read User Manual Online (PDF format)
Download This Manual (PDF format)

Quick Start Guide:
MicroBlaze Soft Processor for Vitis 2021.1

INTRODUCTION

This Quick Start Guide will walk you through creating a basic MicroBlaze™ processor system using processor preset designs.
Additional resources and information can be found on the reverse side to help you tailor a MicroBlaze processor system to your exact design specifications. Features include:

– Royalty-Free
– Highly Configurable
– High Performance
– Low Power
– Linux and RTOS support
– Free Development Tools

What is the MicroBlaze Processor?

MicroBlaze is Xilinx’s soft processor core optimized for embedded applications on Xilinx devices. The MicroBlaze processor is easy to use and delivers the flexibility to select the combination of peripherals, memory, and interfaces as needed.
The MicroBlaze processor is commonly used in one of three preset configurations as shown in the table below: a simple microcontroller running bare-metal applications; a real-time processor featuring cache and a memory protection unit interfacing to tightly coupled on-chip memory running FreeRTOS; and finally, an application processor with a memory management unit running Linux. The table (below) shows performance and utilization estimates for these configurations on an Artix®-7 device.

| Microcontroller| Real-Time| Application
---|---|---|---
MHz| 204| 172| 146
Logic Cells| 1900| 4000| 7000
% Utilization| 1%| 2%| 4%

*Based on XC7A200T -3 speed grade devices
MicroBlaze can be used as a stand-alone processor in all Xilinx FPGAs or as a co-processor in a Zynq® SoC system. It can also be configured to add tamper protection and fault protection by configuring in lock-step mode as well as providing single-event upset mitigation with Triple Modular Redundancy. Designs with multiple processors can be debugged simultaneously using the Xilinx Vitis™ Unified Software Platform.

BEFORE YOU BEGIN

This Quick Start Guide assumes you are targeting a Xilinx development board. If this board comes from a Xilinx board partner, you need to download the latest boards and example projects within Vivado. See the FAQ (next page) for links to some of our partners.

HARDWARE DEVELOPMENT

Start Vivado® Design Suite (2021.1 or later).
Under Tools select Vivado Store. Select the Boards tab then click Refresh in the bottom left corner to download the latest version of the catalog.
When the download is complete, choose Open Example Project.
When Wizard opens, read informational text and click Next.
Before choosing a template, click Refresh again at the bottom left corner.
From the templates, select MicroBlaze Design Presets, then click Next.
Enter a project name and location for project files and click Next.
Choose the target board and click Next.
Choose Microcontroller and click Next.
Now click Finish to create the project and the Block Design will open.
Double click the MicroBlaze block in the diagram.
Under Predefined Configurations notice that there are different configuration settings of the MicroBlaze including those mentioned in the table on the left. Click Cancel to keep the current settings.
To now save the design press Ctrl + S or click File→Save Block Design.
Next, to generate the bitstream, which contains configuration data for the FPGA, choose Generate Bitstream.
Launch Synthesis and Implementation runs, click Yes. Build status is shown in the top right corner of Vivado. Ready indicates completion.
When completed, click OK to Open Implemented Design.
From the main toolbar, click File and select Export→Export Hardware. Check the box to Include Bitstream and make sure it is exported to the same project location and click OK.
To start software development with this MicroBlaze processor, select Tools → Launch Vitis IDE from the main toolbar. Vitis will now open and import the hardware platform, including the MicroBlaze μP.

SOFTWARE DEVELOPMENT

When Vitis launches, click Browse… to select the same project location as the workspace and then click Launch.
Choose to Create Application Project then click Next.
Click on the Create a new platform from hardware (XSA) tab then click Browse.
Verify your project location and select the XSA file and click Open then click Next.
Set project name to Hello_world with no spaces.
Set System project to “your board name”_system with no spaces and then click Next.
Click Next, then choose the Hello World template and click Finish.
Expand the src folder and double click HelloWorld.c to view and edit the source code.
Click on the build button to build your project.
You will see two important folders in the Explorer window:

Hello_world contains all binaries, .C, and .H (Header) files mb_preset_wrapper includes the board support package (bsp) folder – Software drivers, software specification, and Makefile.

Make sure your target board is turned on and connected to the host PC via the USB-JTAG port – this port also serves as the USB-UART connection to the MicroBlaze processor.
On the top toolbar, click Xilinx → Program Device then Program again to program your FPGA with your hardware design.

SOFTWARE DEVELOPMENT (cont’d)

Set up the UART terminal for serial communication by clicking Window → Show View…, then expand the Terminal folder and double click Terminal.
Open a terminal by clicking the icon on the bottom right.
Choose Serial Terminal and use the following settings:
Use Correct COM Port
Baud Rate: 115200
Data Bits: 8
Parity: None
Stop Bits: 1
Flow Control: None
Timeout(sec): 5
Click OK.
Now download the application by right-clicking on your
Hello_world project and choosing Run As… Select Launch
Hardware (Single Application Debug), then click OK.
Your program will run, and you should see “Hello World” pop up inside of your Serial Terminal.
Congratulations! You have created your first MicroBlaze processor application.
Now you can try building and running other example applications, like the ones provided:

FAQs and ADDITIONAL RESOURCES

How do I load third-party boards into Vivado example designs?
As shown in Vivado download the latest boards & update example projects.
Where should I start to learn more about the MicroBlaze processor?
Visit the MicroBlaze Design Hub. It contains links to documentation, wikis, and video tutorials that provide lots of information. Most of the document links in this FAQ can also be found there.
Where can I find specific details about the MicroBlaze processor?
Go to: UG984 – MicroBlaze Processor Reference Guide.
How can I estimate the size and performance for my configured MicroBlaze processor?
Go to: MicroBlaze Performance Metrics as a starting point.
Where can I find a more comprehensive tutorial?
Go to: UG940 – Lab 3: Using the Embedded MicroBlaze Processor.
Where do I go for more details about creating a Vivado tool design?
Visit our Vivado Design Hubs.
Do I need to be in the Vivado tools to start Vitis?
No. Vitis is a unified software platform that can be launched independently from Vivado. However, you’ll need a Viti’s platform or create a new platform from the hardware (.xsa) file to target for software development.
What do I do if the board I’m targeting is not on the list?
Many board vendors provide board files and platforms that can be added to Vivado and Vitis. Contact the specific manufacturer for these files.
What if I need to make changes to my hardware design?
Close Vitis and make the required HW design edits in the Vivado tools, then follow the sequence for bit file generation. This updated hardware design must then be exported from the Vivado tools and imported into Vitis as a new platform.
How do I expand the capability of my evaluation board?
PMODs, Arduino shields, Click boards, and FMC cards can be used to expand the capabilities of our evaluation boards.
How do I create a bootable flash image that contains my bitstream and application?
See chapter 7 of UG898. In Vivado, Tools → Associate ELF Files…
In Vitis, Xilinx → Program FPGA (select ELF for MicroBlaze).
What happens when I export the hardware and launch Vitis?
A Xilinx Support Archive (.xsa) file is created. This file contains HW specifications, IP interfaces, external signal information, and local memory address information. This is used by Vitis to create a hardware platform.
How do I communicate between Zynq®-7000 SoC and MicroBlaze?
See this QTV on YouTube: Zynq and MicroBlaze IOP Block, OCM, and Memory Resource Sharing.
How do I debug multiple processors in a single system?
Heterogeneous Multicore Debugging with Xilinx SDK.
How much FPGA memory can the MicroBlaze processor access?
MicroBlaze systems can be created that access all the available memory on an FPGA. But this comes at the cost of lower FMAX. Typical MicroBlaze implementations use 128KB or less.
What OS & libraries are supported in Vitis for MicroBlaze?
See Supported Operating Systems & UG643 – OS and Libraries Guide.
Can I run Linux or an RTOS on the MicroBlaze processor?
Yes. For best performance, choose the Application or Real-Time
Predefined Configuration in the MicroBlaze settings in Vivado.
How do I create a Linux bootloader for the MicroBlaze processor?
Go to: Build U-Boot for MicroBlaze.

Resources

MicroBlaze Documentation Design Hub
MicroBlaze Getting Started Wiki
MicroBlaze Soft Processor Core Product Page
Using the MicroBlaze Processor to Accelerate Cost-Sensitive Embedded System Development
Document Navigator Embedded Hub
Vivado Design Suite Tutorials
Xilinx Vitis Tools Help
Knowledge Base Answer Records
Third-Party Partner Boards
Avnet | Digilient | Trenz | Enclustra | iWave | MYiR | ALINX
Quick Start Guide: MicroBlaze Soft Processor for Vitis 2019.2