Zlink ZL-BLE-002 Plug In Dimmer Module User Manual

ZL-BLE-002 Datasheet
HardWare Version V1.1
2023/03/24

ZL-BLE-002 Features

ZL-BLE-002 Adopting Zhuhai Jieli Technology Co.,LTD plan(AC6321A4), The main purpose is to make users more convenient.
High performance 32-bit RISC CPU

• RISC 32-bit CPU
• DC-96MHz operation
• 73KB data RAM
• 8KB I-cache 2way
• 1KB Rocache 1way
• 64 Vectored interrupts
• 8 Levels interrupt priority

Flexible I/O

• 25 GPIO pins
• All GPIO pins can be programmable as input or output individually
• All GPIO pins are internal pull-up/pull-down selectable individually
• CMOS/TTL level schmitt triggered input
• External wake up/interrupt on all GPIOs

Peripheral Feature

• Two Full Speed USB OTG controller
• Four Multi-function 32-bit timers, support capture and PWM mode
• Three full-duplex advanced UART(DMA)
• Three SPI interface supports host and device mode (DMA)
• One IIC interface supports host and device mode
• RTC,with alarm clock and time base to wake up the chip
• 16-bit PWM generator for motor driving
• Three IQ Encoder
• 16 channels 10-bit ADC
• 1 channel 8 levels Low Power Detector
• Embedded PMU support low power mode
• 2 Crystal Oscillator
• Watchdog
• Power-on reset

Bluetooth Feature

• CMOS single-chip fully-integrated radio and baseband
• Compliant with Bluetooth
• V5.0+BR+EDR+BLE specification
• Bluetooth Piconet and Scatternet support
• Meet class2 and class3 transmitting power requirement
• Support GFSK and π/4 DQPSK all packet types
• Provides +8dbm transmitting power
• Receiver with -92dBm sensitivity Support: att / gap / gatt / ftms / Hrs profile

Power Supply

• LDOIN is 4.5V to 5.5V
• VBAT is 1.8V to 3.4V
• VDDIO is 1.8V to 3.4V

Temperature

• Operating temperature: -20℃ to +85
• Storage temperature: -65℃ to +150

Pin Definition

2.1 Pin Assignment

2.2 Pin Description

Table 2-1 ZL-BLE-002 Pin Description

Name| I/O
Type| Function| Other Function
---|---|---|---
LDOIN/PP0| P| Charge Power 5V| PWM3: Timer3 PWM Output;
UART0_TXD: Uart0 Data Out(D);
UART0_RXD: Uart0 Data In(D);
VBAT| P| LDO Power| 0
PB0| I/O| GPIO (High Voltage )| CLKOUT0;
UART1_TXB: Uart1 Data Out(B);
TMR2CK;
PA9/P00| I/O| GPIO (pull up)
[High Voltage(P00)]| Long Press Reset;
ADC8: ADC Channel 8;
PA8| I/O| GPIO| TMR3: Timer3 Clock In;
SPI1_DOA: SPI1 Data Out(A);
IIC_SDA_C: IIC SDA(C);
ADC4: ADC Channel 4;
UART1_RXC: Uart1 Data In(C);
PWMCH1L;
PA6| I/O| GPIO| TMR1: Timer1 Clock In;
SPI1_CLKA: SPI1 Clock(A) ;
IIC_SCL_C: IIC SCL(C);
ADC3: ADC Channel 3;
UART1_TXC: Uart1 Data Out(C);
PWMCH1H;
USB0DM| I/O| GPIO (pull down)| CAP0: Timer0 Capture;
SPI1_DIA: SPI1 Data In(A);
UART0_RXA: Uart0 Data In(A);
TMR1CK;
USB0DP| I/O| GPIO (pull down)| SPI2_DOB: SPI2 Data Out(B);
IIC_SDA_A: IIC SDA(A);
ADC11: ADC Channel 11;
UART1_RXD: Uart1 Data In(D);
PA5| I/O| GPIO| SPI2_CLKB: SPI2 Clock(B);
IIC_SCL_A: IIC SCL(A);
ADC10: ADC Channel 10;
UART1_TXD: Uart1 Data Out(D);
PA4| I/O| GPIO| TMR0: Timer0 Clock In;
SPI2_DIB: SPI2 Data In(B);
ADC2: ADC Channel 2;
UART0_TXA: Uart0 Data Out(A);
TMR0CK;
PA3| I/O| GPIO| PWM1: Timer1 PWM Output;
IIC_SDA_D: IIC SDA(D);
UART2_RXA: Uart2 Data In(A);
PA2| I/O| GPIO| CAP2: Timer2 Capture;
IIC_SCL_D: IIC SCL(D);
ADC1: ADC Channel 1;
UART2TXA: Uart2 Data Out(A);
PWMCH0L;
PA1| I/O| GPIO| CAP3: Timer3 Capture;
Q-decoder0 1;
UART0_RXC: Uart0 Data In(C);
UART1_RTS;
PB9| I/O| GPIO (High Voltage)| PWM0: Timer0 PWM Output;
Q-decoder0_0;
ADC0: ADC Channel 0;
UART0_TXC: Uart0 Data Out(C);
UART1_CTS;
PB9| I/O| GPIO| CLKOUT1;
UART2_TXB: Uart2 Data Out(B);
UART2_RXB: Uart2 Data In(B);
PWMCH0H;
PB8| I/O| GPIO| 32K_OSCI;
32K_OSCO;
PB7| I/O| GPIO (High Voltage)| SPI2_DOA: SPI2 Data Out(A);
UART2_RXC: Uart2 Data In(C);
PB6| I/O| GPIO| SPI2_CLKA: SPI2 Clock(A) ;
ADC12: ADC Channel 12;
UART2_TXC: Uart2 Data Out(C);
TMR3CK;
PB5| I/O| GPIO (High Voltage)| SPI2_DIA: SPI2 Data In(A);
UART1_RXA: Uart1 Data In(A);
PWMCH3L;
PB4| I/O| GPIO| TMR2: Timer2 Clock In;
Q-decoder2_0;
SPI1_DIB: SPI1 Data In(B);
ADC9: ADC Channel 9;
UAR1_TXA: Uart1 Data Out(A);
PWMCH3H;
USB1DM| I/O| GPIO (pull down)| SPI1_DOB: SPI1 Data Out(B) ;
IIC_SDA_B: IIC SDA(B);
ADC6: ADC Channel 6;
UART2_RXD: Uart2 Data In(D);
USB1DP| I/O| GPIO (pull down)| SPI1_CLKB: SPI1 Clock(B) ;
IIC_SCL_B: IIC SCL(B);
ADC5: ADC Channel 5;
UART2_TXD: Uart2 Data Out(D);
PB3| I/O| GPIO (High Voltage )| UART0_RXB: Uart0 Data In(B);
PWMCH2L;
Q-decoder1_1;
PB2| I/O| GPIO (pull up)| MCLR;
UART0_TXB: Uart0 Data Out(B);
PWMCH2H;
Q-decoder1_0;
PB1| I/O| GPIO (pull up)| PWM2: Timer2 PWM Output;
ADC7: ADC Channel 7;
UART1_RXB: Uart1 Data In(B);
LVD;
Gnd| P| Gnd|

Electrical Characteristics

3.1 Absolute Maximum Ratings
Table 3-1

Note : The chip can be damaged by any stress in excess of the absolute maximum ratings listed below.
3.2 Recommended Operating Conditions

3.3 Battery Charge
Table 3-3

3.4 IO Input/Output Electrical Logical Characteristics
Table 3-4

IO input characteristics

Symbol| Parameter| Min| Typ| Max| Unit| Test Conditions
VIL| Low-Level Input Voltage| -0.3| –| 0.3 VDDIO| V| VDDIO = 3.3V
VIH| High-Level Input Voltage| 0.7 VDDIO| –| VDDIO+0.3| V| VDDIO = 3.3V

IO output characteristics

VOL| Low-Level Output Voltage| –| –| 0.33| V| VDDIO = 3.3V
VOH| High-Level Output Voltage| 2.7| –| –| V| VDDIO = 3.3V

3.5 Internal Resistor Characteristics
Table 3-5

Port| Drive Strength| Internal
Pull-Up Resistor| Internal
Pull-Down Resistor| Comment
---|---|---|---|---
PA1-PA9, PB4,PB6,| drive_select[11] 24mA drive_select[10] 24mA (with 120ohm res) drive_select[01] 8mA drive_select[00] 8mA (with 120ohm res)| 10K| 10K| 1.PA9&PB2 default pull up
2.USB0DM&USB0DP default pull down
3.Internal pull-up/pull- down resistance | accuracy ±20%
4. PA0,PB5,PB7 can pull- up resistance to 5V
PA0,PB5, PB7| 8mA| 10K| 10K
USB0DP| 4mA| 1.5K| 15K
USB0DM| 4mA| 180K| 15K

3.6 BT Characteristics
3.6.1 Transmitter Basic Data Rate
Table 3-6

Enhanced Data Rate
Table 3-7

Power Supply VBAT=3.3V
2441MHz
π/4 DQPSKModulation
Accuracy| DEVM RMS| | 7| | %
DEVM 99%| | 12| | %
DEVM Peak| | 17| | %
Adjacent Channel Transmit Power| +2MHz| | -40| | dBm
-2MHz| | -38| | dBm
+3MHz| | -44| | dBm
-3MHz| | -35| | dBm

3.6.2 Receiver
Basic Data Rate
Table 3-8

Power Supply
VBAT=3.3V
2441MHz
Co-channel Interference Rejection| | -9| | dB
Adjacent Channel Interference Rejection|  J14f| | +5| | dB
– 1MHz| | +2| | dB
+2MHz| | +37| | dB
-2MHz| | +36| | dB
+3MHz| | +40| | dB
-3MHz| | +35| | dB

Enhanced Data Rate
Table 3-9

Power Supply
VBAT=3.3V
2441MHz
Co-channel Interference Rejection| | -9| | dB
Adjacent Channel  Interference
Rejection| +1MHz| | +5| | dB
– 1MHz| | +2| | dB
+2MHz| | +37| | dB
-2MHz| | +36| | dB
+3MHz| | +40| | dB
-3MHz| | +35| | dB

FTMS Protocol

Main functions of the module is Send FTMS device data to APP, the app must support FTMS protocol.
There are two way to get FTMS device data:

• Fitness device trigger pulse to the module, and then the module calculate the FTMS data. after that, the module send the data to the app.
• Fitness device send device data to module by uart, the module send the ftms data to app by FTMS protocol.

In pulse mode:
We should set the gpio parameter. Pull up or pull down. get the informaton: Circumference, resistance .

Circumference: mm,The distance between two pulses,it is a const value.
Speed: 0.01km/h.
??, ??: ms.

When Ftms APP connect to the smart device, the app will send start command. And then the smart device will start calc sport data. Elapsed time Timer will run. the smart device start calc the sport data base on the Pulse. Speed, distance, calories etc.
The Calculation method hava many type, the customer can Provide Calculation method, we Try to achieve as much as possible.
As it should be, the smart device can get the sport data from uart. The protocol Similar to Ble Ftms.
Be continued

Heart Rate Service

The Heart Rate data capture method similar to ftms(Pulse mode). It calc the interval betwin two pulse. And then calc the Heat Rate, the unit is Beat per mintus. if the device use uart mode to capture data. It will get the heart rate directly.

Federal Communications Commission Statement

This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment.
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and the receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.

In order to comply with FCC RF Exposure requirements, this device must be installed to provide at least 20 cm separation from the human body at all times.
The FCC rules that are applicable to the modular transmitter is FCC Part 15 Subpart C

For final host product:
Label and compliance information: advise host manufacturers to provide a physical / e-label stating, “Contains FCC ID: 2BA9M-ZLBLE002” with finished product.
Part 15 Subpart B disclaimer: final host product still requires Part 15B compliance testing with the modular transmitter installed.

Antenna Specification

Summary

Azimuth Beam

Pattern

| Omni-directional
Impedance| 50 Ohm
Antenna Length| 38.20mm
Manufacture| ZHUHAI JIELI TECHNOLOGY CO.,LTD

Horizontal: 2400 MHz 2450 MHz 2500 MHz
Power (dBm)
Max: 0 Min: -40 Scale: 5/div

Frequency

(MHz)

| Gain(dB)
---|---
Max| Min| Avg
2400| -1.26174| -30.0801| -7.18716
2450| -0.765802| -36.5604| -7.48023
2500| -0.585582| -22.0315| -6.59127

ANT Test Labs：Attestation of
Global Compliance Co., Ltd.

Documents / Resources

| Zlink ZL-BLE-002 Plug In Dimmer Module [pdf] User Manual
ZL-BLE-002 Plug In Dimmer Module, ZL-BLE-002, Plug In Dimmer Module, Dimmer Module, Module
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