Cactus Technologies 245S Industrial pSLC SSD Instruction Manual

Cactus Technologies 245S Industrial pSLC SSD

Product Information

The Cactus Technologies Limited Industrial pSLC -245S Series SSD is a solid- state drive designed for industrial use. It offers high reliability and performance for various applications.

Features

• Supported Standards
• Host and Technology Independence
• Defect and Error Management
• Power Supply Requirements

Specifications

System Environmental Specifications

Operating: 20G, MIL-STD-883G Method
Operating: 2005.2, Condition A| Operating & Non-Operating: 3,000 G, MIL-STD- 883G Operating:
Method 2002.4, Condition C| Operating & Non-Operating: 100,000 feet maximum
Operating:| Note: extended parts are temperature screened only; long term
reliability could be compromised if the product is used at extended
temperatures for long periods of time.

System Power Requirements

Product Usage Instructions

To use the Cactus Technologies Limited Industrial pSLC -245S Series SSD, please follow these instructions:

1. Ensure that the operating temperature is within the specified range of 8% to 95% non-condensing.
2. Avoid exposing the SSD to excessive vibration or shock beyond the specified limits of 20G and 3,000 G respectively.
3. Make sure the altitude does not exceed 100,000 feet relative to sea level during operation.
4. Connect the DC input voltage (VCC) with a maximum ripple of 100 mV (p-p) to the SSD.
5. For idle operation, the SSD requires a current of 95 mA. During reading and writing operations, the current should be respectively 510 mA and 560 mA.

Features:

• Solid state design with no moving parts
• Available in industry standard 2.5” 7mm form factor
• Capacities from 8GB to 512GB
• Compliant with Serial ATA 3.1 specifications
• ATA-8 ACS2 command set compatible
• Supports Serial ATA Generation I/II transfer rate of 1.5/3.0/6.0 Gbps
• Supports ATA SMART Feature Set
• Supports ATA Security Feature Set
• Supports Host Protected Area Feature Set
• Supports Data Set Management (TRIM)
• Supports NCQ w/ max. queue depth of 32
• Supports DevSLP
• True Psuedo-SLC mode operation
• ECC capable of correcting up to 66 bit errors per 1KB
• Enhanced error correction, < 1 error in 1014 bits read
• Voltage support: 5.0V±10%

Cactus Technologies® Industrial pSLC SSD is a high capacity solid-state flash memory product that complies with the Serial ATA 3.1 standard and is functionally compatible with a SATA hard disk drive. Cactus Technologies® Industrial pSLC SSD provides up to 512GB of formatted storage capacity. Cactus Technologies® Industrial pSLC SSD product uses high quality industrial gradeMLC NAND flash memory from Kioxia Corporation and operates in true Psuedo-SLC mode (i.e. not Fast Page mode), thus resulting in enhanced endurance and performance over standard MLC NAND flash. In addition, it includes an on-drive intelligent controller that manages interface protocols, data storage and retrieval as well as ECC, defect handling and diagnostics, power management, and clock control. The controller’s firmware is upgradeable, thus allowing feature enhancements and firmware updates while keeping the BOM stable.

Supported Standards
Cactus Technologies® Industrial pSLC SSD is fully compatible with the following specification:

• ATA 8/ACS2 Specification published by ANSI
• Serial ATA 3.1 Specification published by the Serial ATA International Organization

Product Features

Cactus Technologies® Industrial pSLC SSD contains a high level, intelligent controller. This intelligent controller provides many capabilities including the following:

• Standard ATA register and command set (same as found on most magnetic disk drives).
• Manages details of erasing and programming flash memory independent of the host system
• Sophisticated defect managing capabilities (similar to magnetic disk drives).
• Sophisticated system for error recovery using powerful error correction code (ECC).
• Intelligent power management for low power operation.

Host and Technology Independence
Cactus Technologies® Industrial pSLC SSD appears as a standard SATA disk drive to the host system. The drive utilizes a 512-byte sector which is the same as that in an IDE magnetic disk drive. To write or read a sector (or multiple sectors), the host computer software simply issues an ATA Read or Write command to the drive as per the SATA protocol. The host software then waits for the command to complete. The host system does not get involved in the details of how the flash memory is erased, programmed or read as this is all managed by the built-in controller in the drive. Also, with the intelligent on-board controller, the host system software will not require changing as new flash memory evolves. Thus, systems that support the Cactus Technologies® Industrial pSLC SSD products today will continue to work with future Cactus Technologies® Industrial pSLC SSDs built with new flash technology  without having to update or change host software.
Defect and Error Management
Cactus Technologies® Industrial pSLC SSD contains a sophisticated defect and error management system similar to those found in magnetic disk drives. The defect management is completely transparent to the host and does not consume any user data space. The soft error rate for Cactus Technologies® Industrial pSLC SSD is much lower than that of magnetic disk drives. In the extremely rare case where a read error does occur, the drive has sophisticated ECC to recover the data. These defect and error management systems, coupled with the solid-state construction, give Cactus Technologies® Industrial pSLC SSDs unparalleled reliability.

Power Supply Requirements
Cactus Technologies® Industrial pSLC SSD operates at a voltage range of 5.0 volts ± 10%.
Product Specifications
For all the following specifications, values are defined at ambient temperature and nominal supply voltage unless otherwise stated.
System Environmental Specifications
Table 2-1. Environmental Specifications

| | Cactus Technologies ® Industrial pSLC SSD
---|---|---
Temperature| Operating:| 0° C to +70° C (Standard)

-40° C to +85° C (extended)

Humidity| Operating & Non-

Operating:

| 8% to 95%, non-condensing
Vibration| Operating & Non-

Operating:

| 20G, MIL-STD-883G Method

2005.2, Condition A

Shock| Operating & Non-

Operating:

| 3,000 G, MIL-STD-883G

Method 2002.4, Condition C

Altitude (relative to sea level)| Operating & Non-

Operating:

| 100,000 feet maximum

Note: extended parts are temperature screened only; long term reliability could be compromised if the product is used at extended temperatures for long periods of time.

System Power Requirements
Table 2-2. Power Requirements

| | Cactus Technologies ® Industrial pSLC SSD
---|---|---
DC Input Voltage (VCC) 100 mV max. ripple (p-p)| | 5.0V ±10%
(Maximum Average Value)

See Notes.

| Idle: Reading: Writing:| 95 mA

510 mA

560 mA

NOTES: All values quoted are typical at ambient temperature and nominal supply voltage unless otherwise stated. Sleep mode is specified under the condition that all drive inputs are static CMOS levels and in a “Not Busy“ operating state.

System Performance
All performance timings assume the drive controller is in the default (i.e., fastest) mode.
Table 2-3. Performance

Read Transfer Rate| 8GB

16GB-512GB

| Up to 300MBytes/sec Up to 540MBytes/sec
---|---|---
Write Transfer Rate| 8GB| Up to 135 MBytes/sec
| 16GB| Up to 270 MBytes/sec
| 32GB| Up to 425 MBytes/sec
| 64GB| Up to 425 MBytes/sec
| 128GB| Up to 450 MBytes/sec
| 256GB-512GB| Up to 445 MBytes/sec

System Reliability
Table 2-4. Reliability

Note: estimated TBW assumes workload consisting of mostly large block writes; estimate TBW will be substantially reduced for workloads consisting of mostly random, small block writes.
Physical Specifications
The following sections provide the physical specifications for Cactus Technologies® Industrial pSLC SSD products.

2.5” SSD Physical Specifications

Interface Description
The following sections provide detailed information on the Cactus Technologies® Industrial pSLC SSD interface.
SSD Pin Assignments and Pin Type
Cactus Technologies® SSD uses industry standard 7+12 SATA connector. The signal/pin assignments and descriptions are listed in Table 3-5.
Table 3-5. SSD Pin Assignments and Pin Type

Signal Segment Pin #| Signal Name| Pin Type| | Power Segment Pin #| Signal Name| Pin Type
---|---|---|---|---|---|---
S1| GND| | | P1| 3.3V|
S2| RXP| Analog In| P2| 3.3V|
S3| RXN| Analog In| P3| DEVSLP| DevSleep Control
S4| GND| | P4| GND|
S5| TXN| Analog Out| P5| GND|
S6| TXP| Analog Out| P6| GND|
S7| GND| | P7| 5V|
| P8| 5V|
P9| 5V|
P10| GND|
P11| Reserved|
P12| GND|
P13| 12V|
P14| 12V|
P15| 12V|

Electrical Specifications
The following table defines all D.C. Characteristics for the SSD products. Unless otherwise stated, conditions are:

• Vcc = 5.0V ± 10%
• Ta = -40°C to 85°C

Absolute Maximum Ratings

DC Characteristics

Operating Current

Idle Active

| ICC| |

100

565

| mA

AC Characteristics
Cactus Technologies® SSD products conforms to all AC timing requirements as specified in the SATA-IO specifications. Please refer to that document for details of AC timing for all operation modes of the device.
ATA Drive Register Set Definition and Protocol
The communication to or from the SSD is done using FIS. Legacy ATA protocol is supported by using the legacy mode defined in the SATA specifications. In this mode, the FIS has defined fields which provide all the necessary ATA task file registers for control and status information. The Serial ATA interface does not support Primary/Secondary or Master/Slave configurations. Each SATA channel supports only one SATA device, with the register selection as defined by the ATA standard.
ATA Task File Definitions
The following sections describes the usage of the ATA task file registers. Note that the Alternate Status Register of legacy ATA is not defined for SATA drives.
Data Register
The Data Register is a 16-bit register, and it is used to transfer data blocks between the SSD data buffer and the Host.

Error Register
This register contains additional information about the source of an error when an error is indicated in bit 0 of the Status register. The bits are defined as follows:

• Bit 7 (BBK) This bit is set when a Bad Block is detected.
• Bit 6 (UNC) This bit is set when an Uncorrectable Error is encountered.
• Bit 5 This bit is 0.
• Bit 4 (IDNF) The requested sector ID is in error or cannot be found.
• Bit 3 This bit is 0.
• Bit 2 (Abort) This bit is set if the command has been aborted because of a status condition: (Not Ready, Write Fault, etc.) or when an invalid command has been issued.
• Bit 1 This bit is 0.
• Bit 0 (AMNF) This bit is set in case of a general error.

Feature Register
This register provides information regarding features of the SSD that the host can utilize.
Sector Count Register
This register contains the number of sectors of data requested to be transferred on a read or write operation between the host and the SSD. If the value in this register is zero, a count of 256 sectors is specified. If the command was successful, this register is zero at command completion. If not successfully completed, the register contains the number of sectors that need to be transferred in order to complete the request.
Sector Number (LBA 7-0) Register
This register contains the starting sector number or bits 7-0 of the Logical Block Address (LBA) for any SSD data access for the subsequent command.
Cylinder Low (LBA 15-8) Register
This register contains the low order 8 bits of the starting cylinder address or bits 15-8 of the Logical Block Address.
Cylinder High (LBA 23-16) Register
This register contains the high order bits of the starting cylinder address or bits 23-16 of the Logical Block Address.

Drive/Head (LBA 27-24) Register
The Drive/Head register is used to select the drive and head. It is also used to select LBA addressing instead of cylinder/head/sector addressing. The bits are defined as follows:

• Bit 7 This bit is set to 1.
• Bit 6 LBA is a flag to select either Cylinder/Head/Sector (CHS) or Logical Block Address Mode (LBA). When LBA=0, Cylinder/Head/Sector mode is selected. When LBA=1, Logical Block Address is selected. In Logical Block Mode, the Logical Block Address is interpreted as follows:
  • LBA07-LBA00: Sector Number Register D7-D0.
  • LBA15-LBA08: Cylinder Low Register D7-D0.
  • LBA23-LBA16: Cylinder High Register D7-D0.
  • LBA27-LBA24: Drive/Head Register bits HS3-HS0. Bit 5 This bit is set to 1.
• Bit 4 (DRV) DRV is the drive number. This should always be set to 0.
• Bit 3 (HS3) When operating in the Cylinder, Head, Sector mode, this is bit 3 of the head number. It is Bit 27 in the Logical Block Address mode.
• Bit 2 (HS2) When operating in the Cylinder, Head, Sector mode, this is bit 2 of the head number. It is Bit 26 in the Logical Block Address mode.
• Bit 1 (HS1) When operating in the Cylinder, Head, Sector mode, this is bit 1 of the head number. It is Bit 25 in the Logical Block Address mode.
• Bit 0 (HS0) When operating in the Cylinder, Head, Sector mode, this is bit 0 of the head number. Itis Bit 24 in the Logical Block Address mode.

Status Registers
These registers return the status when read by the host. Reading the Status register does clear a pending interrupt while reading the Auxiliary Status register does not. The meaning of the status bits are described as follows:

• Bit 7 (BUSY) The busy bit is set when the device has access to the command buffer and registers and the host is locked out from accessing the command register and buffer. No other bits in this register are valid when this bit is set to a 1.
• Bit 6 (RDY) RDY indicates whether the device is capable of performing operations requested by the host. This bit is cleared at power up and remains cleared until the device is ready to accept a command.
• Bit 5 (DWF) This bit, if set, indicates a write fault has occurred.
• Bit 4 (DSC) This bit is set when the device is ready.
• Bit 3 (DRQ) The Data Request is set when the device requires that information be transferred either to or from the host through the Data register.
• Bit 2 (CORR) This bit is set when a Correctable data error has been encountered and the data has been corrected. This condition does not terminate a multi-sector read operation.
• Bit 1 (IDX) This bit is always set to 0.
• Bit 0 (ERR) This bit is set when the previous command has ended in some type of error. The bits in the Error register contain additional information describing the error.

Device Control Register
This register is used to control the drive interrupt request and to issue an ATA soft reset to the drive. The bits are defined as follows:

• Bit 7 This bit is used in 48-bit addressing mode. When cleared, the host can read the most recently written values of the Sector Count,Drive/Head and LBA registers. When set, the host will read the previous written values of these registers. A write to any Command block register will clear this bit.
• Bit 6 This bit is an X (Do not care).
• Bit 5 This bit is an X (Do not care).
• Bit 4 This bit is an X (Do not care).
• Bit 3 This bit is ignored by the drive.
• Bit 2 (SW Rst) This bit is set to 1 in order to force the drive to perform an AT Disk controller Soft Reset operation. The drive remains in Reset until this bit is reset to ‘0’.
• Bit 1 (-IEn) The Interrupt Enable bit enables interrupts when the bit is 0. When the bit is 1, interrupts from the drive are disabled. This bit is set to 0 at power on and Reset.
• Bit 0 This bit is ignored by the drive.

Drive Address Register
This register is provided for compatibility with the AT disk drive interface. It is recommended that this register not be mapped into the host’s I/O space because of potential conflicts on Bit 7. The bits are defined as follows:

Bit 7 This bit is unknown.
Implementation Note:
Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller operating at the same addresses as the SSD. Following are some possible solutions to this problem:

1. Locate the SSD at a non-conflicting address (i.e., Secondary address (377) when a Floppy Disk Controller is located at the Primary addresses).
2. Do not install a Floppy and a SSD in the system at the same time.
3. Implement a socket adapter that can be programmed to (conditionally) tri-state D7 of I/0 address 3F7/377 when a SSD product is installed and conversely to tri-state D6-D0 of I/O address 3F7/377 when a floppy controller is installed.
4. Do not use the SSD’s Drive Address register. This may be accomplished by either a) If possible, program the host adapter to enable only I/O addresses 1F0-1F7, 3F6 (or 170- 177, 176) to the SSD or b) if provided use an additional Primary/Secondary configuration in the SSD that does not respond to accesses to I/O locations 3F7 and 377. With either of these implementations, the host software must not attempt to use  information in the Drive Address Register.
   • Bit 6 (-WTG) This bit is 0 when a write operation is in progress, otherwise, it is 1.
   • Bit 5 (-HS3) This bit is the negation of bit 3 in the Drive/Head register.
   • Bit 4 (-HS2) This bit is the negation of bit 2 in the Drive/Head register.
   • Bit 3 (-HS1) This bit is the negation of bit 1 in the Drive/Head register.
   • Bit 2 (-HS0) This bit is the negation of bit 0 in the Drive/Head register.
   • Bit 1 (-nDS1) This bit is 0 when drive 1 is active and selected.
   • Bit 0 (-nDS0) This bit is 0 when the drive 0 is active and selected.

ATA Command Description
This section defines the ATA command set supported by Cactus Technologies® Industrial pSLC SSDs.
ATA Command Set
Table 5-6 summarizes the supported ATA command set .
Table 5-6. ATA Command Set

S.M.A.R.T. Feature Set
Cactus Technologies® -245 Series SSDs supports S.M.A.R.T. attribute reporting. This following subcommands are supported when programmed into the Feature Register:

S.M.A.R.T Data Structure
The Read Data commands returns 512 bytes of data in the following structure:

activitiies
366| Vendor specific
367| Off-line data collection capabilities
368-369| SMART capabilities
370| Error logging capabilities: bit[7:1] – reserved; bit[0]: 1=device error logging supported
Byte| Description
---|---
371| Vendor specific
372| Short self-test routine recommended polling time (in minutes)
373| Extended self-test routine recommended polling time (in minutes)
374| Conveyance self-test routine recommended polling time (in minutes)
375-385| Reserved
386-395| Firmware Version/Date Code
396-397| Reserved
398-399| Reserved
400-405| ‘SM2246’
406-510| Vendor specific
511| Data structure checksum

S.M.A.R.T Attributes
The following table lists the attributes returned in bytes 2-361 of the 512-byte SMART data. Each attribute occupies 12 byte of data. Byte 0 is Attribute ID, bytes 1-2 are status flags, bytes 3-4 are reserved bytes; the table below shows the definitions of bytes 5-11:

Note that some 3rd party utilities may report this attribute as ‘Percent Remaining Life’ or ‘SATA PHY Error Count’; this is not valid for -245S series pSLC products, please ignore it.

Appendix A. Ordering Information

Model KDXFI-245S
Where: X is drive capacities:

• 8G —————- 8GB
• 16G ————– 16GB
• 32G ————– 32GB
• 64G ————– 64GB
• 128G ———— 128GB
• 256G ———— 256GB
• 512G ———— 512GB

Where: I is temperature grade

• blank ———— standard
• I ———— extended (contact factory for lead time)

Example:

1. 8GB 2.5” SSD ———————————————————– KD8GF-245S
2. 8GB 2.5” SSD extended temp. ———————————— KD8GFI-245S
3. 512GB 2.5” SSD ——————————————————- KD512GF-245S

Appendix B.Technical Support Services
B.1.Direct Cactus Technologies® Technical Support
Email: tech@cactus-tech.com.

Appendix C.Cactus Technologies® Worldwide Sales Offices

• Email: sales@cactus-tech.com.
• Email: americas@cactus-tech.com.

Appendix D.Limited Warranty

WARRANTY STATEMENT
Cactus Technologies® warrants its Industrial pSLC products only to be free of any defects in materials or workmanship that would prevent them from functioning properly for two years from the date of purchase or when rated TBW is exceeded, whichever occurs first. This express warranty is extended by Cactus Technologies® Limited to customers of our products.
GENERAL PROVISIONS
This warranty sets forth the full extent of Cactus Technologies® responsibilities regarding the Cactus Technologies® Industrial pSLC Flash Storage Products. Cactus Technologies®, at its sole option, will repair, replace or refund the purchase price of the defective product. Cactus Technologies® guarantees our products meet all specifications detailed in our product manuals. Although Cactus Technologies® products are designed to withstand harsh environments and have the highest specifications in the industry, they are not warranted to never have failure and Cactus Technologies® does not warranty against incidental or consequential damages. Accordingly, in any use of products in life support systems or other applications where failure could cause injury or loss of life, the products should only be incorporated in systems designed with appropriate redundancy, fault tolerant or backup features.
WHAT THIS WARRANTY COVERS
For products found to be defective, Cactus Technologies® will have the option of repairing, replacing or refunding the purchase price the defective product, if the following conditions are met:

• A. The defective product is returned to Cactus Technologies® for failure analysis as soon as possible after the failure occurs.
• B. An incident card filled out by the user, explaining the conditions of usage and the nature of the failure, accompanies each returned defective product.
• C. No evidence is found of abuse or operation of products not in accordance with the published specifications, or of exceeding maximum ratings or operating conditions.

All failing products returned to Cactus Technologies® under the provisions of this limited warranty shall be tested to the product’s functional and performance specifications. Upon confirmation of failure, each product will be analyzed, by whatever means necessary, to determine the root cause of failure. If the root cause of failure is found to be not covered by the above provisions, then the product will be returned to the customer with a report indicating why the failure was not covered under the warranty. This warranty does not cover defects, malfunctions, performance failures or damages to the unit resulting from use in other than its normal and customary manner, misuse, accident or neglect; or improper alterations or repairs. Cactus Technologies® Limited may repair or replace, at its discretion, any product returned by its customers, even if such product is not covered under warranty, but is under no obligation to do so.
RECEIVING WARRANTY SERVICE
According to Cactus Technologies® warranty procedure, defective product should be returned only with prior authorization from Cactus Technologies® Limited. Please contact Cactus Technologies® Customer Service department (tech@cactus- tech.com) with the following information: product model number and description, nature of defect, conditions of use, proof of purchase and purchase date. If approved, Cactus Technologies® will issue a Return Material Authorization or Product Repair Authorization number and instructions to ship the product back to us for service.

CONTACT

• Industrial pSLC
• -245S series SSD
• Product Manual
• August 14, 2023
• www.cactus-tech.com.

References

• ICUC Subscriber Line Number 3 ICUC Subscriber Number 3 ICUC Directory Listings ending in 3

Read User Manual Online (PDF format)

Read User Manual Online (PDF format)  >>

Download This Manual (PDF format)

Download this manual  >>