Surenoo ST7789V TFT LCD Panel User Manual

Surenoo ST7789V TFT LCD Panel

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Shenzhen Surenoo Technology Co.,Ltd.
www.surenoo.com
Skype: Surenoo365

General Description

Mechanical Specification

42.72(W)60.26(H)3.75(T)（RTP）

(FPC not include)

| ****

mm

Resolution| 240RGB320| dots
LCD Active area| 36.72(W)48.96 (H)| mm
Pixel size| 0.153(W)*0.153(H)| mm

Mechanical Dimension

Electrical Maximum Ratings

V

|

1.8

|

3.3

|

V

|

–

Supply voltage（VDD）| V| 2.8| 3.3| V| –
Operating temperature| TOPR| -20| 70| ℃| –
Storage temperature| TSTR| -30| 80| ℃| –

Brightness characteristic & Power dissipation

Item| Symbol| Min| Typical| Max| ****

Unit

---|---|---|---|---|---
LED module Forward voltage|

VLED

| 2．9|

3.1

|

3.3

|

V

LED module current|

ILED

|

–

|

60

|

–

|

mA

LCD Surface Luminance|

LS

|

250

|

300

|

–

| Cd/m2
LCM Surface brightness uniform|

LD

|

80

|

–

|

–

| %
LCD power dissipation| PLCD| –| 0.22| –| W

NOTE: PLCD=VDD * (ILED+ILCD)

Module Function Description

P I N No.| S y m b o l| Description| N o t e s
---|---|---|---
1| ****

XL(X-)

| Touch panel Logical foot| ****

–

2| YU(Y+)| Touch panel Logical foot| ****

–

3| XR(X+)| Touch panel Logical foot| ****

–

4| YD(Y+)| Touch panel Logical foot| ****

–

5| GND| Ground| ****

–

6| VDDI| Power Supply for I/O System.

（ I/O 1.8-3.3V)

| ****

–

7

| ****

VDD

| Power Supply for Analog, Digital System and Booster Circuit.（ 2.8-3.3V)|

–

8| TE| Tearing effect signal is used to synchronize MCU to frame memory|

–

9

| ****

CSX/SPI CSX

| -Chip selection pin Low enable.

High disable.

| ****

–

10| DCX/SPI SCL| -Display  data/command  selection  pin  in  parallel interface.

-This pin is used to be serial interface clock.

|
11| WRX/A0(SPI4)| -Write enable in MCU parallel interface.

– Display data/command selection pin in 4-line serial interface.

|

12

| ****

RDX

| -Read enable in 8080 MCU parallel interface.

-If not used, please fix this pin at VDDI or GND.

| ****

–

---|---|---|---

13

| ****

SPI SDI/SDA

| SPI interface input pin.

-The data is latched on the rising edge of the SCL signal.

-If not used, please fix this pin at VDDI or DGND level.

（4 -SPI ，VDDI GND）

| ****

–

14

| ****

SPI SDO

| -SPI interface output pin.

-The data is output on the falling edge of the SCL signal.

-If not used, let this pin open.

（4 SPI

| ****

–

15

| ****

RESX

| -This signal will reset the device and it must be applied to properly initialize the chip.

-Signal is active low.

| ****

–

16| ****

GND

| Ground| ****

–

17-24| DB0-DB7| MCU parallel interface data bus.

MCU  8

| ****

–

25-32| DB8-DB15| MCU parallel interface data bus.

MCU 8

| ****

–

33| LED-A| Anode of Backlight (2.9V-3.3V Typical:3.1V)

（2.9-3.3V,:3.1V）

| ****

–

34-36| LED-K| Cathode of Backlight| ****

–

37| GND| Ground| ****

–

38| IM0| -The MCU interface mode select.| ****

–

39| IM1| **| –
40| IM2*| NOTE，IM3| –

STP0240D2 MCU-16

STP0240D2 MCU-8

STP0240D2 4-W SPI

Response time & Contrast ratio

Viewing Angle

Bottom 6| CR≥10| 55| 65| –
Left 9| CR≥10

| 55| 65| –
Right 3| CR≥10 10| 55| 65| –

Reliability Trial

Function In Room Temperature Are Allowable
2| Low Temperature Non-Operating Test| -30℃120Hrs
3| High Temperature/Humidity Non Operating Test| 60℃90%RH120Hrs
4| High Temperature Operating Test| 70℃72Hrs
5| Low Temperature Operating Test| -20℃*72Hrs
6| Thermal Shock Test| -20  ℃ (30Min)                Q70  ℃

(30Min) *10CYCLES

Inspection standards

Glass defect

1

| Dimension Unconformity

(Major defect)

| By Engineering Drawing|

2

| Cracks

(Major defect)

| 1.         Linear cracks panel

【Reject】

2.         Nonlinear crack contrast by limited sample

| ****
3| Glass extrude the conductive area

(minor defect)

| a: disregards and no influence assemblage.

1)        b≤1/3Pin width(non bonding area)

【Accept】

2. bonding area≤0.5mm

【Accept】

| A: Length, b: Width

4

| Pin-side ,conductive area damaged

(minor defect)

| (a c: disregards)

b≤1/3of effective length for bonding electrode

【Accept】

| a: length, b: Width, c: Thickness

---|---|---|---
5| Pin-side,non-conductive area damaged

(minor defect)

| 1) Damage area don’t touch the ITO (Inclueling contraposition mark, except scribing mark)

【Accept】

2. C<T b≦BM1/3of width

【Accept】

3. c=T

b not touch the seal glue

【Accept】

4. a disregards

| a: Length, b: Width c: Thickness

6| Non-pin-side damage

(minor defect)

| c<T

1)b exceeds 1/3Bm

【Reject】

c=T

b not touch the seal glue

【Reject】

| c: Thickness b: width of

damage

LCD appearance defect(View area)

1

| ****

Fiber 、 glass cratch、polarizer scratch/folded

(minor defect)

| Specification| Allowable| note1:L: Length, W: Width note2: disregard if out of AA

W≦0.03mm| disregard
0.03mm<W≦0.05mm;

L≦3.0mm

| 2
0.05mm<W≦0.1mm;

L≦3.0mm

| 1
W>0.1mm;L>3.0mm| 0

2

| Polarizer bubble、concave and convex

(minor defect)

| φ≦0.2mm| disregard| note1: φ=(L+W)/2,L:Length,

W :Width

note2:disregard if out of AA

0.2mm<φ≦0.3mm| 2
0.3mm<φ≦0.5mm| 1
0.5mm<φ| 0
3| Black dots、dirty dots、| φ≦0.15mm| disregard| note2:disregard if out of AA
 | impurities、eye winker

(minor defect)

| 0.15mm<φ≦0.25mm| 2|
---|---|---|---|---
0.25mm<φ≦0.3mm| 1
0.3mm<φ| 0
4| Polarizer prick

(minor defect)

| φ≦0.1mm| disregard| note1: φ=(L+W)/2,L=Length,

W=Width

note2:the distance between two dots>5mm

0.1mm<φ≦0.25mm| 3
φ>0.25mm| 0

Package Method

www.surenoo.com

References

• Surenoo Tech: Professional LCD Module Supplier Since 2005

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