theretroweb Friend-386SX Mainboard User Guide

June 1, 2024
theretroweb

theretroweb Friend-386SX Mainboard

theretroweb-Friend-386SX-Mainboard-Product

Product Information

Specifications

  • Model: Friend-386SX Mainboard
  • Manufacturer: Not specified
  • Processor: 80386SX Microprocessor
  • Chipset: NEAT Chipset
  • Memory: RAM and ROM
  • BIOS: ROM BIOS
  • Expansion Slots: I/O Expansion Slots

Product Usage Instructions

System Board Features
Provides an overview of the Friend-386SX System board.

Configuring the System Board
Includes procedures for setting up your System board for operation.

  • 2-1 Setting the Jumpers
  • 2-2 CMOS Software Setup
  • 2-3 NEAT Setup

System Board Hardware
Describes the components of the Friend-386SX System board.

  • 4-1 The 80386SX Microprocessor
  • 4-2 The 80387SX Math Coprocessor
  • 4-3 I/O Expansion Slots
  • 4-4 RAM
  • 4-5 ROM and ROM BIOS
  • 4-6 The NEAT Chipset
  • 4-7 System Memory
  • 4-8 I/O Port Addresses

The EMS 4.0 Device Driver
Helps you install the resident driver program for an optional expanded memory subsystem.

FAQ

  • Q: What should I do if I encounter POST Boot Messages during startup?
    A: Refer to Table 4 in the manual for a reference on POST Boot Messages and troubleshoot accordingly.

  • Q: How do I set up the NEAT Chipset?
    A: Follow the instructions provided in Chapter 2, specifically sections 2-3 on NEAT Setup.

  • Q: Where can I find information on I/O Port Addresses?
    A: Check Chapter 3, sections 4-8 for details on I/O Port Addresses.

All product information provided in this guide is based on the latest information available at the time of printing. The manufacturer cannot be held responsible for any inadvertent omissions or errors that may appear in this document.

Trademarks
IBM, PC, XT, AT, and PS/2 are registered trademarks of International Business Machines Corporation. MSDOS is a registered trademark of Microsoft Corporation. Intel is a registered trademark of Intel Corporation. CHIPSet is a trademark of Chips & Technologies Incorporated. Lotus is a registered trademark of Lotus Development Corp.

Howto UseThis Manual
This manual contains information to help you get the best from your Friend- 386SX System board. You should understand some of the concepts of Computer architecture before using this publication. Here’s what you’ll find in this manual:

  • Chapter 1, “System Board Features,” presents an overview of the Friend-386SX System board.
  • Chapter 2, “Configuring the System Board,” Shows you the procedures for setting up your System board for Operation.
  • Chapter 3, “System Board Hardware,” describes the components of the Friend-386SX System board.
  • Chapter 4, “The EMS 4.0 Device Driver,” helps you to install the resident driver program for an optional expanded memory subsystem.

The appendixes contain reference tables for the Power-On Seif Test, AMI ROM BIOS, and Phoenix ROM BIOS. You’ll also find a glossary of Computer terms at the end of the manual.

System Board Features

The Friend-386SX System board provides the performance benefits of a 32-bit programming architecture with the cost savings associated with 16-bit Hardware Systems. The Friend-386SX is fully compatible with the IBM PC/AT but offers greater efficiency and higher performance than PC/AT System boards.

The Friend-386SX incorporates the 32-bit Intel 80386SX microprocessor with a 1 6-bit external data bus The Friend-386SX uses advanced technologies and the Chips & Technologies NEAT CHIPSet to provide high-speed performance for the most advanced multi-user, multitasking Computer applications available today. The System board offers the following advanced features:

  • Fully IBM PC/AT-compatible
  • Intel 80386SX microprocessor runs both 16- and 32-bit Software
  • Microprocessor support:
    • Seven-channel direct memory access (DMA) Controllers
    • 16-level Interrupt System
    • System clock
    • three programmable timers
  • ROM subsystem
  • RAM subsystem
  • 32-bit channel
  • Audio subsystem with speaker
  • Keyboard Controller and connector
  • Socket for optional 80387SX math coprocessor
  • Landmark Speed Index (Version 0.99) of 26.1 MHz at 20 MHz, zero wait state
  • 3.2 MIPS (Power Meter Test, V1.02)
  • Licensed AMI BIOS (Phoenix BIOS optional)
  • Six 16-bit and Two 8-bit input/output (I/O) expansion slots
  • Shadow RAM for ROM BIOS and video ROM to improve system performance
  • LIM-EMS 4.0 Support
  • Page-interleaved memory Controller provides higher performance than conventional DRAM access schemes
  • Low power consumption: +5V, 3.5AMP
  • Dimensions (length x width) : 21.8 x 32.8 cm (8.6 x 12.9 inches)

Configuring the System Board

SettinatheJumpers
Jumpers on the System board are preset. If you reconfigure your Computer System, you may need to change the settings of one or more of the following jumpers. Refer to Figure 1 for the positions of the jumpers on the System board.

NOTE:
A jumper is CLOSED (sometimes referred to as ‘shorted’) with the plastic jumper block inserted over both pins of the jumper. A jumper is OPEN with the plastic jumper block inserted over one or no pin(s) of the jumper.

theretroweb-Friend-386SX-Mainboard-Fig- \(2\)theretroweb-Friend-386SX-Mainboard-Fig- \(3\)theretroweb-Friend-386SX-Mainboard-Fig- \(4\)

Chanaina the CPU Speed
When you boot your Computer, the Friend-386S will operate at the clock speed that you have chosen with the CMOS Setup Software (see the next section of this chapter for information on CMOS Setup Software).

Change the clock speed by pressing the turbo switch on your Computer. You can also press the CTRL, ALT, and “-” or CTRL, ALT, and”+” keys simultaneously.

CMOS Software Setup
CMOS (Complementary Metal Oxide Semiconductor) RAM is used to störe configuration information such as:

  • the date and time
  • the storage capacity of the System board
  • what type of display adapter is installed
  • the number and type of disk drives installed

The CMOS memory is maintained by a battery that is installed on the System board. By using the battery, all memory in CMOS can be retained when the System power switch is turned off. You may change the CMOS configuration by running the ROM BIOS Setup utility.

Using the AMI BIOS Setup Utility
To enter the setup utility, turn on or reset the Computer System. The ROM BIOS performs System diagnostics and displays the size of the memory being tested. You can bypass the memory test by pressing the key. This option is useful if the System memory is large.

This prompt appears on the screen next:

  • Press the Key to run SETUP or DIAGS
  • Press the DEL key to enter the Setup or Diagnosticstheretroweb-Friend-386SX-Mainboard-Fig- \(5\)

Enter the correct time in the format shown on the screen. To keep the current time, press the Key. From this point, the setup takes one of two different paths, depending upon the status of the CMOS RAM.

CMOS Initialized
If the CMOS RAM has already been initialized, you will see the following Information on the screen:

  • Fixed disk drive C-type: X (If Installed else Not Installed)
  • Fixed disk drive D-type: X (If Installed else Not Installed)
  • Diskette drive A is:
    • High Capacity (K 360KB then Double
    • Sided, If not present not installed)
  • Diskette drive B is Double the other options as above)
  • The base Memory Size is: XXX KB
  • Expansion memory size is: XXXX KB

Are these options correct (Y/N)?
If the Information displayed above is correct, press and then the key to boot the System with the new Information.

CMOS Uninitialized
If the CMOS RAM has not been initialized, you must first enter the disk drive type definition for fixed drive C. The following message appears on the screen:

WARNING
Entering the wrong disk drive TYPE causes improper Operation of the disk If the disk is not installed press For disk TYPE details press

Enter disk drive C type (1-47).
To see a list of disk type details, press the ESC key. This information is also provided in Appendix B. When you have finished viewing the disk type details, press ESC again to return to the above screen.

  • Enter the appropriate number for your drive type and then press the ENTER key. Note that pressing the ENTER Key without first entering a number indicates the absence of drive C. You will then be asked to enter the type of disk drive D. The procedure for entering the drive D disk type details is the same as that described above for drive C. If you do not have a disk drive D on your system, press the ENTER key without entering a number.
  • At this point, you have entered all the information the BIOS requires for starting the system.

NOTE:
BIOS detects a few details by itself, e.g., the diskette drive type for a 360KB drive.

NEAT Setup
The NEAT Setup utility is provided on disk. When you enter the NEAT Setup utility, a series of menus (see Figure 2) lets you set the parameters of the 82C206, 82C211, and 82C212. The NEAT Setup utility also lets you enable or disable the shadow RAM and EMS functions.

CAUTION:
Changing NEAT parameters is not recommended for users who have not had previous experience. If in doubt, you should refer the job to a qualified maintenance person.

NOTE:
To use the shadow RAM function, you need at least 1MB of RAM on-board.

theretroweb-Friend-386SX-Mainboard-Fig- \(6\)theretroweb-Friend-386SX-Mainboard-Fig- \(7\)

System Board Hardware

The Friend-386SX system board is a multi-layer printed circuit board (PCB) that fits in any System unit designed for PC/XT or baby AT boards. The Friend- 386SX system board offers a cost-effective alternative for upgrading your current System to the 32-bit level. The Friend-386SX System board employs Very Large Scale Integrated (VLSI) modules such as the Intel 80386SX central processing unit (CPU) and the Chips & Technologies NEAT CHIPSet. The Friend- 386SX includes a socket for an optional 80387SX math coprocessor. It employs dry-film and solder-mask materials and features an 8MHz AT-compatible I/O channel bus and the AMI ROM BIOS (Phoenix BIOS optional).

The Friend-386SX receives direct current from the power supply via two six-pin connectors. Other connectors on the System board are for the keyboard, speaker, and battery.

The 80386SX Microprocessor
The heart of the Friend-386SX System board is the 80386SX microprocessor. The 80386SX is the integrated circuit responsible for performing arithmetic and logical operations and controlling the flow of information throughout the Computer System.

cal operations and controlling the flow of information throughout the Computer system.

The 80386SX is a high-performance 32-bit microprocessor that is 100% object code compatible with the Intel 80286, 8088, and 8086 microprocessors. With virtual 8086 mode addressing, the microprocessor can concurrently execute multiple programs written for the 8088 or 8086 using an operating system such as UNIX or Microsoft OS/2.

The 80386SX microprocessor subsystem includes the following features:

  • Füll 32-bit Internal Architecture
  • Runs 386 Software in a cost-effective 16-bit hardware environment
  • High-performance 16-bit data bus
  • Integrated Memory Management Unit
  • Virtual 8086 mode allows execution of 8086 softwäre in a protected and paged system
  • High-speed numerics support with the optional 80387SX coprocessor
  • Large uniform address space

80386SX Base Architecture
The 386SX microprocessor consists of a central processing unit, a memory management unit, and a bus interface.

The CPU consists of the execution unit and the instruction unit. The execution unit contains the eight 32-bit general purpose registers that are used for both address calculation and data operations and a 64-bit barrel shifter used to speed shift, rotate, multiply, and divide operations. The instruction unit decodes the instruction opcodes and Stores them in the decoded instruction queue for immediate use by the execution unit.

The memory management unit (MMU) consists of a segmentation unit and a paging unit. Segmentation allows the managing of the logical address space by providing an extra addressing component, one that allows easy code and data relocatability, and efficient sharing. The paging mechanism operates beneath and is transparent to the segmentation process, to allow management of the physical address space. The segmentation unit provides four levels of protection for isolating and protecting applications and the operating system from each other. The hardware-enforced protection allows the design of ( Systems with a high degree of integrity.

The 386SX microprocessor has two modes of operation:
Real Address Mode (Real Mode), and Protected Virtual Address Mode (Protected Mode). In Real Mode, the 386SX microprocessor operates with a very fast 8086, but with 32-bit extensions if desired. Real Mode is required primarily to set up the process for protected Mode Operation. Within Protected Mode, Software can perform a task switch to enter into tasks designated as Virtual 8086 Mode tasks. Each such task behaves with 8086 semantics, thus allowing 8086 Software (an application program or an entire operating System) to execute. The Virtual 8086 tasks can be isolated and protected from one another and the host 386SX microprocessor operating System by use of paging.

The 80387SX Math Coprocessor
The Friend-386SX System board has a socket for an optional 80387SX math coprocessor.

The 80387SX math coprocessor is an integrated circuit that enables the System to perform high-speed arithmetic, logarithmic, and trigonometric operations. The coprocessor works in parallel with the microprocessor. The parallel Operation decreases operating time by allowing the coprocessor to do mathematical calculations while the microprocessor continues to do other functions.

The 80387SX is compatible at the object code level with the 80387 math coprocessor. It contains the same 16/24-bit bus structure as the 80386SX microprocessor. The 80387SX implements the IEEE-745 floating-point Standard and delivers three to five times the performance of the 80287.

The coprocessor works with seven numeric data types, which are divided into the following three classes:

  • Binary integers (3 types)
  • Decimal integers (1 type)
  • Real numbers (3 types)

If a program does a lot of calculations, it may run much faster with an 80387SX. However, to take advantage of an 80387SX, your application programs must be designed to use the 80387SX’s features. If you want to use an 80387SX to speed up a program, check with the maker of the program to see whether it can take advantage of an 80387SX.

Installing a Math Coprocessor
To install an optional math coprocessor on the System board, proceed as follows.

CAUTION:
This installation is not recommended for users who have not had previous experience in the assembly of ATclass computer systems. If in doubt, you should refer the job to a qualified maintenance person.

  1. Make sure that you observe precautions against static electricity; a math coprocessor is sensitive to such damage.

  2. Turn off your system.

  3. Align the 80387SX so that the beveled corner of the Chip corresponds to the corner of the socket U10 labeled “1”.

  4. Align the individual pins with the socket holes. straighten the pins, grasp the 80387SX, lay all the pins an one side flat against a hard surface (e.g., the top of the power supply), and gently bend them inwards.
    CAUTION: Math coprocessors are fragile and easily broken.

  5. Carefully but firmly press the Chip into the socket.

  6. To indicate the presence of the coprocessor, remove the plastic jumper block (from pins 1 and 2 of, JPY;

Expansion Slots

  1. The’1/0 channel is accessed via eight expansion slots on the 80386SX System board. These slots are 62- and 36-pin connectors.
  2. Two slots (marked slots 1 and 7) are 8-bit slots that are compalible with those on the IBM PC and PC/XT.
  3. These 62-pin address up to 1 MB, and allow 8-bit data transfers.
  4. Six slots (marked slots 2/1 0, 3/11, 4/1 2, 5/13, 6/14, and 8/15) are 62-pin and 34-pin slots that are compatible with those on the IBM PC/AT. The slots have 1 6 MB address abilily, enabling 16-bit data transfers.

RAM
The RAM (random-access memory) is used to störe the programs currently being executed and the data required or generaled by their execution. On the system board, RAM is located in eight rows of SIMMs (single in-line modules).

Combine different SIMMs on the System board to obtain the desired amount of RAM (from 512 KB to 8 MB). Fach row of SIMM sockets can hold a 256 Kbit or \Mbit module. Use DRAM with an access time oofof 100ofnoseconds, to run the CPU at 16MHz; use 80^ nanosecond’DRAM to run the CPU at 20MHz. The following table shows possible memory combinations for the System board.

System Board Memory Sizes

ROM and ROM BIOS

The System board has two Read-Only Memory (ROM) modules (16×2) that contain the System BIOS (Basic Input/Output System). Either 27128 or 27256 ROM Chips can be inserted into the sockets, but only the same type of Chip can be inserted in the sockets at the same time. The CPU accesses ROM through a local I/O bus 16 bits at a time. The System board functions correctly with ROM devices that have 250 nanoseconds or shorter access times.

The BIOS is made up of code and programs that provide the device-level control for the major I/O devices in the System. The BIOS contains a set of routines that check out the System when you turn it on (called POST, for Power-On Seif Test). The BIOS is compatible with the IBM PC/AT BIOS lang ärograms that access the BIOS using Software interrupts and do not specify absolute memory locations. Programs that refer to absolute locations in the IBM PC/AT BIOS will not function correctly while running on the Friend-386SX System board. The ROM BIOS does not contain code for the BASIC interpreter.

The NEAT CHIP Set
The Chips & Tech CS8221 NEAT CHIPSet is an enhanced, high-performance 4-chip VLSI implementation of the control logic used on the IBM PC/AT. The NEAT CHIPSet consists of the 82C211 CPU/Bus Controller, the 82C212 Page Interleave and EMS Memory controller, the 82C215 Data/Address buffer, and the 82C206 Integrated Peripherals Controller (IPC).

The NEAT CHIPSet Supports the local CPU bus, a 16-bit System memory bus, and the AT buses. The 82C211 provides synchronization and control Signals for all buses. The 82C21 1 also provides an independent AT bus clock and allows for dynamic selection between the processor clock and the user-selectable AT bus clock. Command delays and wait states are softwäre configurable, providing flexibility for slow or fast peripheral boards.

  • Separate CPU and AT bus clocks
  • Page/interleaved Memory Controller
  • Integrated Lotus-lintel-Microsoft Expanded Memory Specification (LIM EMS) Memory Controller. Supports EMS 4.0.
  • Software configurable command delays, wait states, and memory Organisation
  • Optimized for OS/2 Operation
  • Shadow RAM for BIOS to improve System performance

The 82C212 Page/interleave and EMS Memory Controller
The 82C212 Page/interleave and EMS Memory Controller provides an interleaved memory subsystem design with page mode Operation. tt Supports up to 8 MB of on-board DRAM with combinations of 256 Kbit and 1 Mbit DRAMs. Through the Page/interleaved memory scheme, the processor can operate at 20MHz with zero wait state memory accesses, using 100 nanosecond DRAMs.

Shadow RAM loads system BIOS or Video BIOS from slower ROM directly into fast RAM on boot-up of the Computer. The shadow RAM feature allows faster execution of code stored in ROM. The firmware routines of the BIOS are copied into a special memory area; then, through the memory-mapping abilities of the 80386SX, the copy of the BIOS is assigned to the same addresses the BIOS originally used. The original code is switched out of reach. In an MS-DOS environment, memory above 1 MB can be treated as LIM EMS memory.

82C206 Integrated Peripherals Controller (IPC)
The 82C206 is an LSI implementation of the Standard peripherals required to implement an IBM PC/AT system board. It is fully compatible with Intel’s 8237 DMA Controller, 8259 Interrupt Controller, 8254 Timer/Counter, and Motorola’s 146818 Real Time Clock. It offers 7 DMA channels, 13 Interrupt request channels, 2 timer/counter channels, and a real-time clock. The 82C206 provides all of the Standard peripherals required for a System board implementation except the keyboard interface Controller.

The equivalent of two DMA Controllers is provided in the 82C206. Each Controller is a four-channel DMA device (hat will generate the memory addresses and control Signals necessary to transfer Information between a peripheral device and memory directly. This allows highspeed information transferwith little CPU intervention.

The two DMA Controllers are internally connected in such a way as to provide the user with four DMA channels (DMA1) for transfers to 8-bit peripherals and three channels for 16-bit transfers (DMA2). DMA2 channel 0 provides the cascade interconnection between the two devices, thereby maintaining IBM PC/AT compatibility. Included as part of the DMA subsystems is the Page Register (DMAPAGE) device, which is used to supplement the DMA and drive the upper address lines when required.

The DMA Controllers are cascaded together to Service seven DMA channels. Each of the seven channels is assigned a unique I/O address:

The equivalents of two 8259 Programmable Interrupt Controllers are included in the 82C206, providing sixteen Interrupt channels. An Interrupt (int) is a Signal, generated by either hardware or Software, that alerts the CPU that some function needs to be carried out. The Interrupt channels accept requests from peripherals, resolve priority on pending interrupts and interrupts in Service, issue an interrupt request to the CPU, and provide a vector that is used as an Index by the CPU to determine which Interrupt Service routine executes.

The Interrupt channels are partitioned into two cascading Controllers (INTC1 and INTC2) with 8 inputs each. Of these 16 channels, three are connected internally to various devices, allowing 13 user-definable channels of Interrupt. The three internally connected channels are as follows:

  • Channel 0 – Counter/Ttmer
  • Channel 2 – Cascade to SIave Interrupt Controller (INTC2)
  • Channel 8 – Real Time Clock Intermpt

The remaining 13 channels may be defined and used as necessary to meet specific System requirements.

A Counter/Timer subsystem, containing three independent counters, is provided in the 82C206. All three counters are driven from a clock input pin that is independent form the other clock inputs to the device. Counter 0 is connected to interrupt 0 of INTC1. It is intended to be used as a multi-level interrupt to the system for such tasks äs time timekeeping and task switching. Counter 1 may be programmed to generate pulses or square waves for use by external devices. Counter 2 is a full-function Counter/timer with a gate input for controlling the internal counter. This channel can be used äs an interval counter, a timer, or a gated rate/pulse generator.

The 82C206 includes a Real Time Clock (RTC) for maintaining the time and date in addition to storing computer System configuration information. This subsystem also contains 114 bytes of RAM in addition to the Clock/Calendar registers. The Clock/Calendar information and RAM are kept active by connecting the device to an external battery when the System power is turned off. The use of CMOS technology means that the RTC consumes very little power and can be maintained for long periods of time with an inexpensive battery.

System Memory

Table 2. System Memory Map

I/O Port Addresses
Table 3. I/O Port Address Map

Devices on System board:

Devices on I/O slots:

The EMS 4.0 Device Driver

The EMS (Expanded Memory Specification) Version 4.0 device driver is a Standard MS-DOS device driver that gets loaded at boot time by the CONFIG.SYS file. Because EMS 4.0 is a device driver, it should lock like this in the CONFIG.SYS file:

  • DEVICE=EMM.SYS

Without anything else included in this command line, the EMS driver will get loaded with the default hardware values of the I/O address that enables the EMS and the memory address used for EMS paging. These default values are dependent on the NEAT implementation of EMS.

To change these default values, äs well äs add a few extra features, the EMS device driver command tine can look like this:

  • DEVICE=EMM.SYS -Ix -My -Pzz -D

where

  • The command line parameters can be in either upper or lower case.

  • When the EMS driver is first executed, a title and copyright notice will appear on the screen äs follows:

    • EMS Expanded Memory Device Driver Ver. 4.0
  • Copyright (c) Chips and Technoiogies Inc., 1987

  • If the EMS driver detects that a previous EMS driver has been loaded, it will put this message on the screen:

    • An Expanded Memory Manager has already been installed.
  • The EMS driver will then not get loaded into the System.

  • When the EMS driver gets loaded by MS-DOS, an internal check is done on the EMS configuration in hardwäre. If the driver detects any conflicts that would cause EMS not to function properly, the message:

    • The EMS Setup has been incorrectly specified. No EMS is available. will appear on the screen after the EMS Copyright notice and EMS will be disabled. If the EMS hardware is configured properly and the I/O address is overridden by the command line parameter, the screen will show this message:
  • The EMS I/O address has been changed. If the diagnostics Option is selected, this message will appear on the screen:
    Testing EMS Expanded Memory Page Number: No

  • The NNN represents the page number currently under test. If the diagnostics fail, the EMS will be disabled and the following message will appear on the screen:

    • Expanded Memory FAILED diagnostics test.
  • If the diagnostics pass, or if diagnostics were not specified on the command line, the EMS driver has been loaded correctly and EMS is enabled. The final message to appear on the screen is:

    • There are XXX pages or YYYY Kbytes of EMS Expanded Memory on the System.
  • The System can now be used to support Lotus/intel/ Microsoft EMS 4.0 in the same manner as Standard EMS cards.

The Power-On Seif Test

The Power-On Seif Test (POST) runs each time the System is turned on. The POST checks memory, the CPU, the display monitor, the keyboard, the disk drives, and other installed options.

Table4. POST Boot Messages.

theretroweb-Friend-386SX-Mainboard-Fig- \(18\) theretroweb-Friend-386SX-Mainboard-Fig- \(19\) theretroweb-Friend-386SX-Mainboard-Fig- \(20\)

POST Information Messages

Table 6. Run-Time Messages.
Run-time messages are displayed if an error occurs after the boot procedure is complete.

theretroweb-Friend-386SX-Mainboard-Fig- \(22\)

AMIROMBIOS

Table 7. AMI ROM BIOSFixed Fixed Drive Type

theretroweb-Friend-386SX-Mainboard-Fig- \(23\)

Table 8. AMI ROM BIOS Error Message Reference

Errors Displayed on Screen:

Error Generation Beeps:

Table 9. AMI BIOS List of Checkpoints

  • 01 NMI disabled and 286/386 register test about to start
  • 02 286 registertesf aver
  • 03 ROM checksum aver
  • 04 8259 initialization OK
  • 05 CMOS pending Interrupt disabled
  • 06 Video disabled and System timer counting OK
  • 07 CH-2 of 8253 OK
  • 08 CH-2deltacounttestOK
  • 09 CH-1 delta count lest OK
  • 0A CH-OdeltacounttestOK
  • 0B Parity status cleared
  • 0C Refresh and System timer OK
  • 0D Refresh link toggling OK
  • 0E Refresh period ON/OFF 50% OK
  • 10 Confirmed refresh ON and Start 64KB memory lest
  • 11 Address line test OK
  • 12 64 KB base memory test OK
  • 13 Interrupt vectors initialized
  • 14 8242 keyboard Controller fest OK
  • 15 CMOS read/write lest OK
  • 16 CMOS checksum/battery OK
  • 17 Monochrome mode set OK
  • 18 Color mode set OK
  • 19 About to look optional video ROM
  • 1A Optional Video ROM control OK
  • 1 B Display memory read/write test OK
  • 1 C Display memory read/write test for alternate display OK
  • 1 D Video retrace check OK
  • 1 E Global equipment byte set for video OK
  • 1 F Mode set call mono/color OK
  • 20 Video test OK
  • 21 Video display OK
  • 22 Power on message display OK
  • 30 Virtual mode memory test about to begin
  • 31 Virtual mode memory test started
  • 32 Processor in virtual mode
  • 33 Memory address line test in progress
  • 34 Memory address line test in progress
  • 35 Memory below 1 MB calculated
  • 36 Memory size computation OK
  • 37 Memory fest in progress
  • 38 Memory initialization below 1 MB aver
  • 39 Memory initialization aver 1 MB aver
  • 3A Display memory size
  • 3B About to Start below 1 MB memory test
  • 3C Memory test below 1 MB OK
  • 3D Memory test above 1 MB OK
  • 3E About to go to real mode (Shutdown)
  • 3F Shutdown successful and entered real mode
  • 40 About to disable Gate A20 address line
  • 41 Gate A20 line disabled successfully
  • 42 About to Start DMA Controller test
  • 4E Address line test OK
  • 4F Processor in real mode after shutdown
  • 50 DMA page register test OK
  • 51 DMA unit 1 base register lest about to start
  • 52 DMA unit 1 channel OK, about to begin CH-2
  • 53 DMA channel 2 base register lest OK
  • 54 About to test F/F latch for unit 1
  • 55 F/F latch test for both units OK
  • 56 DMA units 1 and 2 programs OK
  • 57 8259 initialization aver
  • 58 8259 mask register check OK
  • 59 Master 8259 maskregister OK
  • 5A About to check timer and keyboard interrupt level
  • 5B Timer Interrupt OK
  • 5C About to test keyboard Interrupt
  • 5D Error… The timer/keyboard interrupt is not at the proper level
  • 5E 8259 interrupt Controller error
  • 5F 8259 interrupt Controller test OK
  • 70 Start of keyboard test
  • 71 Keyboard battery test OK
  • 72 Keyboard test OK
  • 73 Keyboard global data setup OK
  • 74 Floppy setup is about to begin
  • 75 Floppy setup OK
  • 76 Hard disk setup about to Start
  • 77 HarddisksetupOK
  • 79 About to initialize a timer data area
  • 7A Verify CMOS battery power
  • 7B CMOS battery verification done
  • 7D About to analyze diagnostics memory lest results
  • 7E CMOS memory size Update OK
  • 7F About to check optional ROM at C000:0
  • 80 Keyboard sensed to enable setup
  • 81 Optional ROM control OK
  • 82 Printer global data initialization OK
  • 83 RS-232 global data initialization OK
  • 84 80287 check/test OK
  • 85 About to display soft error messages
  • 86 About to give control to system ROM at E000:0
  • 87 System ROM E000:0 check aver
  • 00 Control given to INT 19, boot loader

Phoenix ROM BIOS

TablelO. Phoenix ROM BIOSFixed Drive Type
The System BIOS Supports two fixed drives. Each drive can be one of the types listed in the following table:

Table 11. Phoenix ROM BIOS Error Message Reference

theretroweb-Friend-386SX-Mainboard-Fig- \(30\)

Glossary

  • adapter card – a printed circuit card that gives your Computer the same added capability, such as more memory or control of a new device. A card plugs into an expansion slot on the System board.

  • benchmark – a program used to test and evaluate the performance characteristics of different Systems.

  • BIOS — Basic Input/Output System. Programs that are permanently stored in the System board’s ROM Chips provide functions such as the Power-On Seif Test. See also ROM.

  • Card – See “adapter card.”

  • Central processing unit — An integrated circuit Chip that performs the actual computing functions of the Computer. Other chips in a Computer perform support functions like storing data and controlling peripherals.

  • Chip — See “integrated circuit.”

  • CMOS RAM – Complementary metal oxide semiconductor.

    • A logic circuit family that uses very little power.
    • It works with a wide variety of power supply voltages.
  • Configuration — How a Computer and peripheral equipment (such as printers and display monitors) are interconnected and programmed to operate a System.

  • Coprocessor – A microprocessor device connected to a central microprocessor that performs specialized computations (such as floating-point arithmetic) much more efficiently than the CPU alone.

  • CPU – See “central processing unit.”

  • Device ” A Computer hardware accessory that is used for input or output, such as a disk drive, printer, or keyboard.,

  • Direct memory addressing – A method for transferring data directly to and from main memory, bypassing the CPU.

  • disk-cache – A Software utility that reduces floppy and hard disk access, thus speeding Operation. A disk cache Stores data in memory that is repeatedly read from or written to disk.

  • DMA – See “direct memory addressing.”

  • EMS – a functional definition of a bank-switched memory expansion subsystem made up of hardware expansion modules and a user-installable resident driver program specific to those modules.

  • ESDI – Enhanced Storage Device Interface.

  • expanded memory specification (EMS) – A bank switched memory expansion subsystem made up of hardware expansion modules and a resident driver program.

  • Expansion slot – A connector on the System board for holding an adapter card.

  • hertz (Hz) — A unit of frequency equal to one cycle per second.

  • I/O – An abbreviation for “input/output,” the two basic operations that a Computer performs on its peripherals.

  • interface – A device that alters or converts actual electrical Signals between distinct devices, programs, or Systems.

  • integrated-circuit – An electronic device that combines thousands of transistors on a small sliver, or Chip, of silicon. Such devices are the building blocks of Computers.

  • interleaving – A technique for improving the performance of Computer memories. Successive memory locations are assigned to different banks, cycling through the available banks.

  • jumper — On a printed circuit board, a patch cable or wire is used to establish a circuit.

  • memory — Another name for Computer storage. See also “RAM” and “ROM.”

  • microprocessor – See “central processing unit.”

  • MIPS – Million instructions per second.

  • multitasking – The concurrent execution of two or more tasks, typically applications, by a Computer; may also be the concurrent execution of a single program that is used by many tasks.

  • open circuit – A discontinuous circuit; that is, one that is broken at one or more points and, consequently, can­not conduct current.

  • page — A. set of consecutive bytes. Pages begin on 4KB boundaries. Pages divide programs into multiple uniform-sized pages that have no direct relationship to the logical structure of a program.

  • parameter — A variable that is given value for a specific program. A definable characteristic of an item, device, or system.

  • parity bit — An additional noninformation bit appended to a group of bits to make the number of ones in the group of bits either an odd or even number; an elementary mechanism for error checking.

  • peripheral — A device that a computer uses to transfer information back and forth between itself and the user. Some examples of peripherals are the display monitor, disk drives, and printers.

  • Power-On Self Test (POST) — Check-out procedures that the computer runs automatically when it is turned on. These procedures verify that all the computer’s hardware is functioning properly. If the test detects problems, the computer displays error codes before (or instead of) starting the operating system. The error codes can help a service person determine what is wrong with your computer.

  • RAM — An acronym for “random-access memory.” The type of computer memory that can be used to store in­formation while a program is running. All data stored in RAM is lost when the computer is turned off or power is lost. RAM is stored in several small integrated cir­cuits that are plugged into the system board.

  • ROM — An acronym for “read-only memory.” The type of computer memory that is used to permanently store the information vital to computer operation, including some parts of the operating system. · ROM is permanent and the contents will not be lost when the comput­er is turned off.
    SCSI — Small Computer System Interface.

  • setup – The arrangement of connections between an assembly of individual computing units, and the adjust­ments needed for the computer to operate.

  • shadow RAM — a method of copying BIOS routines in slower ROM chips to much faster RAM, increasing sys­tem performance speed.

  • virtual memory — a technique for running programs that are larger than the available physical memory. Pieces of the program are stored on disk and are moved into memory only as necessary. This movement is automatically performed by the operating system and is invisible to the program.

  • wait state — A delay in the computer’s information pro­cessing cycle caused by a difference in speed between a faster processor and slower memory, which holds data. A zero wait state means ·the processor does not have to “wait” for memory and can access data as fast as it is needed.

  • write precompensation – The varying the timing of the head current from the outer tracks to the inner tracks of the disk to keep a constant ‘write’ signal.

Read User Manual Online (PDF format)

Loading......

Download This Manual (PDF format)

Download this manual  >>

Related Manuals