Analog Devices DC2383A-A Evaluation Board Instruction Manual

DEMO MANUAL DC2383A-A
LTC3644
Quad 17V, 1.25A Synchronous Step-Down
Regulator with Ultralow Quiescent Current

DESCRIPTION

Demonstration circuit 2383A-A features the LT C® 3644: the wide input and output voltage range, high efficiency and power density, quad 1.25A outputs DC/DC synchronous
step-down monolithic regulator. The input voltage range of DC2383A-A is 2.7V to 17V. The default demo board setting of VOUT1, VOUT2, VOUT3, and VOUT4 is 1.2V, 3.3V, 2.5V and 1.8V at 1.25A maximum DC output current per channel. There are two assembly versions. The DC2383A-A features LTC3644 which operates at an internally fixed frequency of 1MHz (Typ), while the DC2383A-B features LTC3644-2 which operates at an internally fixed frequency of 2.25MHz (Typ). The Peak current limit is internally fixed at 2.2A typical per channel. Each channel comes with independent run pin control and power good indicators. Phase shift selection of either 0 degrees or 180 degrees between the switch rising edge of channels 1, 2, and channels 3, and 4 is also available.
DC2383A-A provides optional onboard 0Ω jumpers to configure the LTC3644 as 4-phase dual 2.5A/2.5A outputs or 4-phase triple 2.5A/1.25A/1.25A outputs. Optional 0Ω
jumpers connecting VIN1 to VIN2, VIN3, and VIN4 are available

for users to operate selected channels of LTC3644 at different input voltages than VIN1. A user-selectable MODE/SYNC input is provided to allow users to trade off ripple noise for light load efficiency: pulse-skipping mode (PS) or Burst Mode® operation delivers higher efficiency at light load while forced continuous conduction mode (FCM) is preferred for noise-sensitive applications. The MODE/SYNC pin can also be used to synchronize the switching frequency to an external clock or set the phase shift between channels 1, 2, and channels 3, and 4. Constant frequency, peak current mode control architecture and integrated internal control loop compensation network, allows very fast transient response to line and load changes while maintaining loop stability. The LTC3644 is available in a thermally enhanced, low-profile 36-lead 5mm × 5mm BGA package.
It is recommended to read the data sheet and demo manual of LTC3644 prior to using or making any changes to DC2383A-A.

Design files for this circuit board are available.

BOARD PHOTO

PERFORMANCE SUMMARY Specifications are at TA = 25°C

VIN = 2.7V to 17V (VOUT < VIN)
ILOAD = 0A to 1.25A per Channel| 1.2V ±2%
3.3V ±2%
2.5V ±2%
1.8V ±2%
Default Switching Frequency| Internally Fixed Switching Frequency| 1MHz ±18%
Maximum Continuous Output Current IOUT per Channel IOUT1, IOUT2, IOUT3, IOUT4| fSW = 1MHz
VIN = 2.7V to 17V (VOUT < VIN) VOUT = 1.2V, 1.8V, 2.5V, 3.3V| 1.25A
Efficiency| VIN = 12V fSW = 1MHz
VOUT1 = 1.2V at IOUT1 = 1.25A
VOUT2 = 3.3V at IOUT2 = 1.25A VOUT3 = 2.5V at IOUT3 = 1.25A
VOUT4 = 1.8V at IOUT4 = 1.25A| Channel 1: 79.1%
Channel 2: 89.0%
Channel 3: 86.7%
Channel 4: 84.5%
(Figure 4)
Thermal Performance (Peak Temperature)| VIN = 12V fSW = 1MHz
VOUT1 = 1.2V, VOUT2 = 3.3V, VOUT3 = 2.5V, VOUT4 = 1.8V
IOUT = 1.25A per Channel
TA = 25°C, No Heatsink, No Forced Airflow| LTC3644: 56.3°C L1: 36.6°C
L2: 38.7°C L3: 38.1°C L4: 37.4°C
(Figure 6)
Dynamic Load Transient Response VOUT1(P-P)
VOUT2(P-P) VOUT3(P-P) VOUT4(P-P)| VIN = 12V
fSW = 1MHz, FCM
VOUT1 = 1.2V, IOUT1_STEP = 0.625A to 1.25A VOUT2 = 3.3V, IOUT2_STEP = 0.625A to 1.25A VOUT3 = 2.5V, IOUT3_STEP = 0.625A to 1.25A VOUT4 = 1.8V, IOUT4_STEP = 0.625A to 1.25A
COUT_ceramic = 1×47µF per Channel| VOUT1(P-P) = 128mV (Figure 7a) VOUT2(P-P) = 166mV (Figure 7d) VOUT3(P-P) = 141mV (Figure 7c) VOUT4(P-P) = 134mV (Figure 7b)

QUICK START PROCEDURE

Demonstration circuit 2383A-A is easy to set up to evaluate the performance of the LTC3644. Please refer to Figure 1 for proper measurement equipment setup and follow the test procedures below:

1. With power off, connect the input power supply between VIN (E1) and GND (E7). VIN2, VIN3, and VIN4 are tied to VIN1 (use onboard 0Ω jumpers R31, R29, and R30) by default.

2. Connect the first load between VOUT1 (E18) and GND (E20) for channel 1, connect the second load between VOUT2 (E14) and GND (E16) for channel 2, connect the third load between VOUT3 (E15) and GND (E17), connect the fourth load between VOUT4 (E19) and GND (E21). Preset all the loads to 0A.

3. Connect the DMMs between the input test points: VIN (E1) and GND (E7) to monitor the input voltage. Connect DMMs between VOUT1 (E18) and GND (E20), VOUT2 (E14) and GND (E16), VOUT3 (E15) and GND (E17), VOUT4 (E19) and GND (E21) to monitor the corresponding DC output voltages of channel 1, channel 2, channel 3 and channel 4.

4. Turn on the power supply at the input. Measure and make sure the input supply voltage is 12V. Place the RUN 1 (JP1), RUN2 (JP2), RUN3 (JP5), and RUN4 (JP6) jumpers to the ON position. The output voltages should be 1.2V, 3.3V, 2.5V, and 1.8V ±2% for VOUT1, VOUT2, VOUT3, and VOUT4. Four onboard RUN1, RUN2, RUN3, and RUN4 jumpers allow users to enable or disable each channel independently for evaluation purposes. Users need to disable VOUT2 (3.3V) and VOUT3 (2.5V) when varying the input supply voltage down to 2.7V minimum.

5. Once the input and output voltages are properly established, adjust the input voltage between 2.7V to 17V and the load current within the operating range of 0A to 1.25A max per channel. Observe the output voltage regulation, output voltage ripples, switching node waveform, load transient response, and other parameters. Refer to Figure 2 for proper output voltage ripple measurement. Note 1: To measure the input/output voltage ripples properly, do not use the long ground lead on the oscilloscope probe. See Figure 2 for the proper scope probe technique. Short, stiff leads need to be soldered to the (+) and (–) terminals of an input or output capacitor. The probe’s ground ring needs to touch the (–) lead and the probe tip needs to touch the (+) lead.

6. To program other output voltages for channel 1, channel 2, channel 3, and channel 4, put the RUN1 (JP1), RUN2 (JP2), RUN3 (JP5), and RUN4 (JP6) jumpers to the OFF positions and move JP9, JP7, JP8, JP10 to the output voltage marking of USER SEL for each channel. Calculate and insert the bottom feedback resistors at R26, R20, R21, and R27 and repeat steps 1 to step 5.

7. (Option) Operation with Different Input Voltages: Channel 2, channel 3, and channel 4 can operate with different input voltages than VIN1 and other channels’ VIN. DC2383A-A provides onboard 0Ω jumpers connecting the main VIN (or VIN1) to VIN2 (R31), VIN3 (R29), and VIN4 (R30) by default. Each of these 0Ω jumpers can be removed to disconnect VIN2, VIN3, and VIN4 of the selected channel from VIN1. Different input voltages for channel 2, channel 3, and channel 4 should be applied between VIN2 (E23) and GND (E22), VIN3 (E24) and GND (E26), VIN4 (E25) and GND (E26) test points.
   Note: SVIN is the input voltage to power the internal LDO and this pin is tied to VIN (or VIN1) by default. When operating with different channel input voltages, it is important to make sure VIN1 is on and INTVCC is present. SVIN can also be disconnected from VIN1 (remove R7) and tied to an external voltage source at test point SVIN (E2). SVIN can be a different voltage than VIN1, VIN2, VIN3, and VIN4 and should be tied to the highest input supply voltage.

8. (Option) Frequency Synchronization/Phase Selection: The MODE/SYNC pin can be used to synchronize the internal oscillator clock frequency to the external clock signal. Place JP3 (MODE/PLLIN) at the CLKIN position, and apply an external clock signal at the CLKIN test point (E10) to vary the switching frequency within ±50% of the internal programmed frequency.
   The MODE/SYNC pin can also be used to set the phase shift between channels 1, and 2 and channels 3, and 4 while keeping the PHASE pin tied to INTVCC. The phase shift can be set by modulating the duty cycle of an external clock on the MODE/SYNC pin. In this case, the phase shift will be determined by the applied external clock rising and falling edges. The switch rising edge of channels 1, and 2 is synced to the rising edge of the external clock and the switch rising edge of channels 3, and 4 is synced to the falling edge of the external clock. Crosstalk between channels can be avoided by adjusting the phase shift between channels such that the SW edges do not coincide.

9. a. ( Option) 4-Phase Dual 2.5A/2.5A Output Circuit Configuration: DC2383A-A can be configured as dual 2.5A/2.5A outputs. Channel 1 and channel 4 are master channels, channel 2 and channel 3 are slaves

The following simple modification is required:

1. Tie VIN1, VIN2, VIN3, and VIN4 together or tie VIN1 and VIN2, VIN3 and VIN4 together if operating channel 1 and channel 2 at different input voltage than that of channel 3 and channel 4. Make sure SVIN is tied to the highest input supply voltage.
2. Tie SW1 and SW2, SW3 and SW4 together. Since SW1 and SW2, SW3 and SW4 are tied together, there is only one inductor needed for each output voltage rail. Calculate and insert the inductors needed for L1 and L4, and remove L2 and L3.
3. Tie FB2 and FB3 to INTVCC.
4. Float (do not use) PGOOD2 and PGOOD3. Only PGOOD1 and PGOOD4 are active.
5. Tie RUN1 and RUN2, RUN3, and RUN4 together. Note: Make sure to float all the unused onboard RUN pin jumpers to avoid accidentally shorting VIN to GND.
6. Tie the PHASE pin to INTVCC. Refer to the demo board DC2383A-A schematic for more details.
   9b. (Option) 4-Phase Triple 2.5A/1.25A/1.25A Output Circuit Configuration: DC2383A-A can be configured as triple 2.5A/1.25A/ 1.25A outputs. Channel 1 is a master channel, channel 2 is a slave. Channel 3 and channel 4 are independent channels.

The following simple modification is required:

1. Tie VIN1, VIN2, VIN3, VIN4 together or tie VIN1 and VIN2 together, VIN3 and VIN4 can be at different input voltages than VIN1 and VIN2. Make sure SVIN is tied to the highest input supply voltage.
2. Tie SW1 and SW2 together. There is only one inductor needed for this output voltage rail. Calculate and insert the inductor needed for L1 and remove L2.
3. Tie FB2 to INTVCC.
4. Float (do not use) PGOOD2. Only PGOOD1, PGOOD3 and PGOOD4 are active.
5. Tie RUN1 and RUN2 together. Note: Make sure to float all the unused onboard RUN pin jumpers to avoid accidentally shorting VIN to GND.
6. Tie the PHASE pin to INTVCC.
7. Channel 3 and channel 4 are left unchanged since these two channels operate as independent channels. Refer to the demo board DC2383A-A schematic for more details.

QUICK START PROCEDURE

Load Transient Response Test Conditions:
VIN = 12V, fSW = 1MHz Typical
VOUT1 = 1.2V, VOUT2 = 3.3V
VOUT3 = 2.5V, VOUT4 = 1.8V
L1 = L4 = 2.2µH
L2 = L3 = 4.7µH
Load Step = 0.625A to 1.25A at di/dt = 0.625A/µs
COUT_ceramic = 1×47µF/16V/X5R/1206 (per Channel)
Feedforward Capacitor: CFF = 22pF (per Channel)

PARTS LIST

ITEM| QTY| REFERENCE| PART DESCRIPTION| MANUFACTURER/PART NUMBER
---|---|---|---|---
Required Circuit Components
1| 4| CFF1, CFF2, CFF3, CFF4| CAP, 0402 22pF 5% 50V COG| MURATA GRM1555C1H220JA01D
2| 1| C1| CAP, 2917 22µF 20% 35V TANT| AVX TPSE226M035R0125
3| 7| C2, C4, C5, C7, C9, C10, C14| CAP, 0805 10µF 10% 25V X5R| MURATA GRM21BR61E106KA73L
4| 5| C3, C6, C11, C12, C15| CAP, 0603 4.7µF 20% 25V X5R| MURATA GRM188R61E475ME11D
5| 1| C16| CAP, 0603 1µF 10% 25V X7R| MURATA GRM188R71E105KA12D
6| 4| C19, C21, C23, C25| CAP, 1206 47µF 10% 16V X5R| MURATA GRM31CR61C476ME44L
7| 4| C20, C22, C24, C26| CAP, 1206 10µF 10% 16V X7R| TDK C3216X7R1C106K160AC
8| 2| L1, L4| IND, 2.2µH| COILCRAFT XFL4020-222ME
9| 2| L2, L3| IND, 4.7µH| COILCRAFT XFL4020-472ME
10| 5| RSET1, RSET2, RSET3, RSET4, R25| RES, 0402 619kΩ 1% 1/16W| VISHAY CRCW0402619KFKED
11| 9| R1, R2, R9, R13, R14, R17, R18, R23, R24| RES, 0402 0Ω JUMPER| VISHAY CRCW04020000ZOED
12| 4| R3, R4, R5, R6| RES, 0402 100kΩ 1% 1/16W| VISHAY CRCW0402100KFKED
13| 1| R7| RES, 0402 2.2Ω 1% 1/16W| VISHAY CRCW04022R20FNED
14| 6| R8, R10, R11, R12, R15, R16| RES, 0402 10MΩ 1% 1/16W| VISHAY CRCW040210M0FKED
15| 1| R19| RES, 0402 137kΩ 1% 1/16W| VISHAY CRCW0402137KFKED
16| 1| R22| RES, 0402 196kΩ 1% 1/16W| VISHAY CRCW0402196KFKED
17| 1| R28| RES, 0402 309kΩ 1% 1/16W| VISHAY CRCW0402309KFKED
18| 3| R29, R30, R31| RES, 0805 0Ω JUMPER| VISHAY CRCW08050000ZOEA
19| 1| U1| IC, QUAD 17V, 1A SYNCHRONOUS STEP-DOWN REGULATOR| ANALOG DEVICES LTC3644BGA

Additional Demo Board Circuit Components

Hardware: For Demo Board Only

SCHEMATIC DIAGRAM

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ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high-energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.

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