LCDWIKI MC242GX 2.42inch IIC OLED Module User Manual

MC242GX
2.42inch OLED IIC Display Module
User Manual
CR2023-MI2462

Rsource Description

The resource directory is shown in the following figure:

specifications
3-Structure_Diagram| Includingproduct size structure documents
4-Driver_IC_Data_Sheet| Including OLED screen driver IC Datasheet
5-Schematic| Including product hardware schematic diagram, OLED Altium component diagram, and PCB packaging
6-User_Manual| Contains product user instructions document
7-Character&Picture_Molding_Tool| Contains image extraction software, character extraction software, and software usage
instructions. The image and text display tests in the sample program require the use of these two software for mold taking.

Interface Description

The interface on the back of the module is shown in the following figure:

NOTE:
A. The lIC Address resistor is used to select the IIC slave device address. If it is soldered on the 0x78 side, select the 0x78 slave device address. Ifit is soldered on the 0x7A side, select the 0x7A slave device address;
B. The RES pin row is not soldered by default. If the reset function needs to be controlled in the program, it needs to be soldered;

needs to be controlled in the program, it needs to be soldered

Working Principle

3.1. Introduction to SSD1309 Controller
SSD1309 is an OLED/PLED controller that supports a maximum resolution of 128 * 64 and has a 1024 byte GRAM. Supports 8-bit 6800 and 8-bit 8080 parallel port data buses, as well as 3-wire and 4-wire SPI serial port buses and I2C buses. Due to the large number of 10 ports required for parallel control, the most commonly used ones are the SPI serial port bus and 12C bus. It supports vertical scrolling display and can be used for small portable devices such as mobile phones, MP3 players, etc.
The SSD1309 controller uses 1 bit to control the display of one pixel, so each pixel can only display black and white dual colors. The RAM displayed is divided into a total of 8 pages, with 8 rows per page and 128 pixels per row. When setting pixel data, it is necessary to first specify the page address, and then specify the column low address and column high address separately, so 8 vertical pixel points are set simultaneously each time. In order to flexibly control pixel points at any position, the software first sets a global one- dimensional array of the same size as the display RAM.
The pixel data is first set to the global array, and this process uses OR, AND operations to ensure that the data previously written to the global array is not damaged. Then, the data of the global array is written to the display RAM, so that it can be displayed through OLED.
3.2. Introduction to IIC Communication Protocol
The process of writing data on the 1IC bus is shown in the following figure: After the IIC bus starts working, it first sends the slave device address. After receiving a response from the slave device, it then sends a control byte to notify the slave device. The next data to be sent is a command to write to the IC register or data to write to RAM. After receiving a response from the slave device, it then sends multiple byte values until the transmission is completed and the IIC bus stops working. Among them:
C0=0: This is the last control byte, and the next ones sent are all data bytes
C0=1: The next two bytes to be sent are data bytes and another control byte
D/C =O: Register command operation byte
D/C =1: Bytes for RAM data operation
The sequence diagram of IIC start and stop is as follows:

When both the data line and clock line of the [IC remain at high level, the IIC is in an idle state. At this time, the data line changes from high level to low level, and the clock line continues to remain at high level. The IIC bus starts data transmission. At that time, the clock line remained at high level, the data line changed from low level to high level, and the IIC bus stopped data transmission.
The timing chart for IIC to send a bit of data is as follows: Send 1 bit of data for each clock pulse (the process of pulling up and down). At that time, the clock line was at high power level, and the data line must remain stable.

At that time, the clock line was at low power level in order to allow the data line to change.
The ACK sending sequence diagram is as follows:

When the master device waits for the ACK from the slave device, it needs to keep the clock line at a high level, and when the slave device sends an ACK, it needs to keep the data line at a low level.

Hardware Description

4.1. OLED Display Screen Circuit

This circuit is an OLED display screen circuit, where OLED1 has a 2.42-inch 24P FPC interface. C2~C6 are bypass capacitors for OLED pins. R2 and R3 are the pull-up resistors of the IIC clock and data pins. R1 is the current limiting resistor of the OLED pixel reference current. R4, D2, and C8 together form the OLED reset circuit. The principle is that when the module is powered on, capacitor C8 will charge. At this time, C8 is equivalent to a short circuit, which will directly connect the OLED’s RESET pin to GND. At this time, the OLED’s RESET pin is at a low level, entering the reset state. After C8 is charged, C8 is equivalent to a circuit breaker, and the RESET pin will be pulled up to 3.3V by the R4 pull-up resistor, completing the reset action and entering the normal operating state. The function of D2 is to quickly release the charge of C8 when the OLED module is powered off, nsuring that the reset function of the OLED module can operate normally when the power is quickly cut off and then turned on.
4.2. OLED Extern Power Circuit

This circuitis an OLED external boost circuit, where U2 is an SX1308 boost IC.
C7 is the bypass filter capacitor, L1 is the energy storage inductor, and D1 is thediode that prevents reverse direction. R2 and R3 are feedback resistors. SX1308 switches high-frequency through one pin, and L1 and D1 together form an energy storage circuit. 3-pin FB output feedback voltage. By consulting the data manual of SX1308, it can be seen that its feedback voltage is 0.6V. Therefore, the current flowing through R1 and R2 is 0.6/R1, resulting in VPP=(0.6/R1) x (R1+R2), which is calculated to be approximately 12.6V.

4.3. 5P Pin Interface Circuit

This is a 5P 2.54mm spacing row pin interface circuit used to connect to the main control. Among them, P1 is a 5P pin, and 1-5 pins are GND, VCC, SCL, SDA, and RESET respectively. Due to the internal reset circuit of the module, the RESET pin is not soldered by default. If you want to control the RESET function in the program, you need to solder the pin and connect it to the GPIO port.

4.4. IIC Select Circuit from Device Address

When selecting pull-up, select 0x7A slave device address; When selecting the dropdown, select 0x78 slave device address (default)

4.5. System Power Circuit

This circuit is a module system power regulator circuit, with U1 as the regulator, which can convert external input 5V or 3.3V voltage into 3.3V output, and C1 as the bypass filter capacitor.

Example program usage instructions

For specific instructions, please refer to the example program usage instructions document in the example program directory.
A. Connect the display module to the main control board (directly plug in, use DuPont cable or FPC cable connection);
B. Connect the main control board to the PC (it needs to be connected according to the download method) and power on the main control board;
C. Modify, compile, and download sample programs;
D. Check the display of the module and check if the program runs successfully;

Common tool software

The example program needs to display Chinese and English, symbols, and monochrome images, so the mold taking software PCtoLCD2002 needs to be used.
PCtoLCD2002 is used for text or monochrome image extraction.
The PCtoLCD2002 mold taking software is set as follows:
Dot Matrix Format Selection Yin Code
Select row by row mode for mold taking(C51 test program needs to select Determinant)
Select the direction of the mold taking direction in the clockwise direction (with the higher position in front) (C51 testing program needs to select reverse (low order first))
Output Number System Selection Hexadecimal Number
Custom Format Selection C51 Format

The specific setting method can be found on the following webpage: http://www.lcdwiki.com/Chinese_and English display modulo_settings

www.lcdwiki.com

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