STLINK-V3SET Debugger Programmer User Manual

October 29, 2023
ST

STLINK LogoSTLINK Logo 1 UM2448 User manual
STLINK-V3SET debugger/programmer for STM8 and STM32

Introduction

The STLINK-V3SET is a stand-alone modular debugging and programming probe for the STM8 and STM32 microcontrollers. This product is composed of the main module and the complementary adapter board. It supports the SWIM and JTAG/SWD interfaces for communication with any STM8 or STM32 microcontroller located on an application board. The STLINK-V3SET provides a Virtual COM port interface allowing the host PC to communicate with the target microcontroller through one UART. It also provides bridge interfaces to several communication protocols allowing, for instance, the programming of the target through the bootloader.
The STLINK-V3SET can provide a second Virtual COM port interface allowing the host PC to communicate with the target microcontroller through another UART, called bridge UART. Bridge UART signals, including optional RTS and CTS, are only available on the MB1440 adapter board. The second Virtual COM port activation is done through a reversible firmware update, which also disables the mass-storage interface used for drag-and-drop Flash programming. The modular architecture of STLINK-V3SET enables the extension of its main features through additional modules such as the adapter board for different connectors, the BSTLINK-VOLT board for voltage adaptation, and the B-STLINK- ISOL board for voltage adaptation and galvanic isolation.

STLINK V3SET Debugger Programmer

Picture is not contractual.

Features

  • Stand-alone probe with modular extensions

  • Self-powered through a USB connector (Micro-B)

  • USB 2.0 high-speed interface

  • Probe firmware update through USB

  • JTAG / serial wire debugging (SWD) specific features:
    – 3 V to 3.6 V application voltage support and 5 V tolerant inputs (extended down to 1.65 V with the B-STLINK-VOLT or B-STLINK-ISOL board)
    – Flat cables STDC14 to MIPI10 / STDC14 / MIPI20 (connectors with 1.27 mm pitch)
    – JTAG communication support
    – SWD and serial wire viewer (SWV) communication support

  • SWIM specific features (only available with adapter board MB1440):
    – 1.65 V to 5.5 V application voltage support
    – SWIM header (2.54 mm pitch)
    – SWIM low-speed and high-speed modes support

  • Virtual COM port (VCP) specific features:
    – 3 V to 3.6 V application voltage support on the UART interface and 5 V tolerant inputs (extended down to 1.65 V with the B-STLINK-VOLT or B-STLINK- ISOL board)
    – VCP frequency up to 16 MHz
    – Available on STDC14 debug connector (not available on MIPI10)

  • Multi-path bridge USB to SPI/UART/I 2
    C/CAN/GPIOs specific features:
    – 3 V to 3.6 V application voltage support and 5 V tolerant inputs (extended down to
    1.65 V with the B-STLINK-VOLT or B-STLINK-ISOL board)
    – Signals available on adapter board only (MB1440)

  • Drag-and-drop Flash programming of binary files

  • Two-color LEDs: communication, power

Note: The STLINK-V3SET product does not provide the power supply to the target application.
B-STLINK-VOLT is not required for STM8 targets, for which voltage adaptation is performed on the baseline adapter board (MB1440) provided with the STLINK- V3SET.

General information

The STLINK-V3SET embeds an STM32 32-bit microcontroller based on the Arm ®(a) ® Cortex -M processor.

Ordering

information
To order the STLINK-V3SET or any additional board (provided separately), refer to Table 1.
Table 1. Ordering information

Order code| Board reference|

Description

---|---|---
STLINK-V3SET| MB1441(1) MB1440(2)| STLINK-V3 modular in-circuit debugger and programmer for STM8 and STM32
B-STLINK-VOLT| MB1598| Voltage adapter board for STLINK-V3SET
B-STLINK-ISOL| MB1599| Voltage adapter and galvanic isolation board for STLINK- V3SET

  1. Main module.
  2. Adapter board.

Development environment

4.1 System requirements
• Multi-OS support: Windows ® ® 10, Linux ®(a)(b)(c) 64-bit, or macOS
• USB Type-A or USB Type-C ® to Micro-B cable 4.2 Development toolchains
• IAR Systems ® – IAR Embedded Workbench ®(d) ®
• Keil (d) – MDK-ARM
• STMicroelectronics – STM32CubeIDE

Conventions

Table 2 provides the conventions used for the ON and OFF settings in the present document.
Table 2. ON/OFF convention

Convention

|

Definition

---|---
Jumper JPx ON| Jumper fitted
Jumper JPx OFF| Jumper not fitted
Jumper JPx [1-2]| Jumper must be fitted between Pin 1 and Pin 2
Solder bridge SBx ON| SBx connections closed by 0-ohm resistor
Solder bridge SBx OFF| SBx connections left open

a. macOS® is a trademark of Apple Inc. registered in the U.S. and other countries.
b. Linux ®  is a registered trademark of Linus Torvalds.
c. All other trademarks are the property of their respective owners.
d. On Windows ® only.

Quick start

This section describes how to start development quickly using the STLINK- V3SET.
Before installing and using the product, accept the Evaluation Product License Agreement from the www.st.com/epla web page.
The STLINK-V3SET is a stand-alone modular debugging and programming probe for STM8 and STM32 microcontrollers.

  • It support protocols SWIM, JTAG, and SWD to communicate with any STM8 or STM32 microcontroller.
  • It provides a Virtual COM port interface allowing the host PC to communicate with the target microcontroller through one UART
  • It provides bridge interfaces to several communication protocols allowing, for instance, the programming of the target through the bootloader.

To start using this board, follow the steps below:

  1. Check that all items are available inside the box (V3S + 3 flat cables + adapter board and its guide).
  2. Install/update the IDE/STM32CubeProgrammer to support the STLINK-V3SET (drivers).
  3. Choose a flat cable and connect it between the STLINK-V3SETand the application.
  4. Connect a USB Type-A to Micro-B cable between the STLINK-V3SETand the PC.
  5. Check that the PWR LED is green and the COM LED is red.
  6. Open the development toolchain or STM32CubeProgrammer (STM32CubeProg) software utility.
    For more details, refer to the www.st.com/stlink-v3set website.

7.1 STLINK-V3SET overview
The STLINK-V3SET is a stand-alone modular debugging and programming probe for the STM8 and STM32 microcontrollers. This product supports many functions and protocols for debugging, programming, or communicating with one or several targets. The STLINKV3SET package includes
complete hardware with the main module for high performance and an adapter board for added functions to connect with wires or flat cables anywhere into the application.
This module is fully powered by the PC. If the COM LED blinks red, refer to the technical note Overview of ST-LINK derivatives (TN1235) for details.
7.1.1 Main module for high performance
This configuration is the preferred one for high performance. It only supports STM32 microcontrollers. The working voltage range is from 3 V to 3.6 V.
Figure 2. Probe top side

STLINK V3SET Debugger Programmer - Probe top side

The protocols and functions supported are:

  • SWD (up to 24 MHz) with SWO (up to 16 MHz)
  • JTAG (up to 21 MHz)
  • VCP (from 732 bps to 16 Mbps)

A 2×7-pin 1.27 mm pitch male connector is located in the STLINK-V3SET for connection to the application target. Three different flat cables are included in the packaging to connect with standard connectors MIPI10/ARM10, STDC14, and ARM20 (refer to Section 9: Flat ribbons on page 29).
See Figure 3 for connections:
STLINK V3SET Debugger Programmer - Probe top side 1 7.1.2 Adapter configuration for added functions
This configuration favors the connection to targets using wires or flat cables. It is composed of MB1441 and MB1440. It supports debugging, programming, and communicating with STM32 and STM8 microcontrollers.

STLINK V3SET Debugger Programmer - Probe top side 2

7.1.3 How to build the adapter configuration for added functions
See the operating mode below to build the adapter configuration from the main module configuration and back..

STLINK V3SET Debugger Programmer - Probe top side 3

7.2 Hardware layout
The STLINK-V3SET product is designed around the STM32F723 microcontroller (176-pin in UFBGA package). The hardware board pictures (Figure 6 and Figure 7) show the two boards included in the package in their standard configurations (components and jumpers). Figure 8, Figure 9, and Figure 10 help users locate the features on the boards. The mechanical dimensions of the STLINK-V3SET product are shown in Figure 11 and Figure 12.

STLINK V3SET Debugger Programmer - Probe top side 4

STLINK V3SET Debugger Programmer - Probe top side 5

STLINK V3SET Debugger Programmer - Probe top side 6

STLINK V3SET Debugger Programmer - Probe top side 7

7.3 STLINK-V3SET functions
All functions have been designed for high performance: all signals are 3.3-volt compatible except the SWIM protocol, which supports a voltage range from 1.65 V to 5.5 V. The following description concerns the two boards MB1441 and MB1440 and indicates where to find the functions on the boards and connectors. The main module for high performance only includes the MB1441 board. The adapter configuration for added functions includes both the MB1441 and MB1440 boards.
7.3.1 SWD with SWV
SWD protocol is a Debug/Program protocol used for STM32 microcontrollers with SWV as a trace. The signals are 3.3 V compatible and can perform up to 24 MHz. This function is available on MB1440 CN1, CN2, and CN6, and MB1441 CN1. For details regarding baud rates, refer to Section 14.2.
7.3.2 JTAG
JTAG protocol is a Debug/Program protocol used for STM32 microcontrollers. The signals are 3.3-volt compatible and can perform up to 21 MHz. This function is available on MB1440 CN1 and CN2, and MB1441 CN1.
The STLINK-V3SET does not support the chaining of devices in JTAG (daisy chain).
For correct operation, the STLINK-V3SET microcontroller on the MB1441 board requires a JTAG return clock. By default, this return clock is provided through the closed jumper JP1 on MB1441, but may also be externally provided through pin 9 of CN1 (This configuration may be necessary to reach high JTAG frequencies; in this case, JP1 on MB1441 must be opened). In case of use with the B-STLINK-VOLT extension board, the JTAG clock loopback must be removed from the STLINK-V3SET board (JP1 opened). For the correct functioning of JTAG, the loopback must be done either on the B-STLINK-VOLT extension board (JP1 closed) or on the target application side.
7.3.3 SWIM
SWIM protocol is a Debug/Program protocol used for STM8 microcontrollers. JP3, JP4, and JP6 on the MB1440 board must be ON to activate the SWIM protocol. JP2 on the MB1441 board must also be ON (default position). The signals are available on the MB1440 CN4 connector and a voltage range from 1.65 V to 5.5 V is supported. Note that a 680 Ω pull-up to VCC, pin 1 of MB1440 CN4, is provided on DIO, pin 2 of MB1440 CN4, and consequently:
• No additional external pull-up is required.
• VCC of MB1440 CN4 must be connected to Vtarget.
7.3.4 Virtual COM port (VCP)
The serial interface VCP is directly available as a Virtual COM port of the PC, connected to STLINK-V3SET USB connector CN5. This function can be used for STM32 and STM8 microcontrollers. The signals are 3.3 V compatible and can perform from 732 bps to 16 Mbps. This function is available on MB1440 CN1 and CN3, and MB1441 CN1. T_VCP_RX (or RX) signal is the Rx for the target (Tx for the STLINK-V3SET), T_VCP_TX (or TX) signal is the Tx for the target (Rx for the STLINK-V3SET). A second Virtual COM port may be activated, as detailed later in Section 7.3.5 (Bridge UART).
For details regarding baud rates, refer to Section 14.2.
7.3.5 Bridge functions
The STLINK-V3SET provides a proprietary USB interface allowing communication with any STM8 or STM32 target with several protocols: SPI, I 2
C, CAN, UART, and GPIOs. This interface may be used to communicate with the target bootloader, but may also be used for customized needs through its public software interface.
All bridge signals can be simply and easily accessed on CN9 using wire clips, with the risk that signal quality and performance are lowered, especially for SPI and UART. This depends for instance on the quality of the wires used, on the fact that the wires are shielded or not, and on the layout of the application board.
Bridge SPI
SPI signals are available on MB1440 CN8 and CN9. To reach a high SPI frequency, it is recommended to use a flat ribbon on MB1440 CN8 with all unused signals tied to the ground on the target side.
Bridge I ²C 2 I
C signals are available on MB1440 CN7 and CN9. The adapter module also provides optional 680-ohm pull-ups, which can be activated by closing JP10 jumpers. In that case, the T_VCC target voltage must be provided to any of the MB1440 connectors accepting it (CN1, CN2, CN6, or JP10 jumpers).
Bridge CAN
CAN logic signals (Rx/Tx) are available on MB1440 CN9, they can be used as input for an external CAN transceiver. It is also possible to connect directly the CAN target signals to MB1440 CN5 (target Tx to CN5 Tx, target Rx to CN5 Rx), provided that:
1. JP7 is closed, meaning CAN is ON.
2. CAN voltage is provided to CN5 CAN_VCC.
Bridge UART
UART signals with hardware flow control (CTS/RTS) are available on MB1440 CN9 and MB1440 CN7. They need dedicated firmware to be programmed on the main module before being used. With this firmware, a second Virtual COM port is available and the mass-storage interface (used for Drag-and-drop flash programming) disappears. The firmware selection is reversible and is done by STLinkUpgrade applications as shown in Figure 13. The hardware flow control may be activated by physically connecting UART_RTS and/or UART_CTS signals to the target. If not connected, the second virtual COM port works without hardware flow control. Note that the hardware flow control activation/deactivation cannot be configured by software from the host side on a virtual COM port; consequently configuring a parameter related to that on the host application has no effect on the system behavior. To reach a high UART frequency, it is recommended to use a flat ribbon on MB1440 CN7 with all unused signals tied to the ground on the target side.

STLINK V3SET Debugger Programmer - Probe top side 9

For details regarding baud rates, refer to Section 14.2.
Bridge GPIOs
Four GPIO signals are available on MB1440 CN8 and CN9. Basic management is provided by the public ST bridge software interface.
7.3.6 LEDs
PWR LED: red light indicates that 5 V is enabled (only used when a daughterboard is plugged).
COM LED: refer to the technical note Overview of ST-LINK derivatives (TN1235) for details.
7.4 Jumper configuration
Table 3. MB1441 jumper configuration

Jumper| State|

Description

---|---|---
JP1| ON| JTAG clock loopback done on board
JP2| ON| Provides 5 V power on connectors, required for SWIM usage, B-STLINK- VOLT, and B-STLINK-ISOL boards.
JP3| OFF| STLINK-V3SET reset. Can be used to enforce STLINK-V3SET UsbLoader mode

Table 4. MB1440 jumper configuration

Jumper| State|

Description

---|---|---
JP1| Not used| GND
JP2| Not used| GND
JP3| ON| Getting 5 V power from CN12, required for SWIM usage.
JP4| OFF| Disables SWIM input
JP5| ON| JTAG clock loopback done on board
JP6| OFF| Disables SWIM output
JP7| OFF| Closed to use CAN through CN5
JP8| ON| Provides 5 V power to CN7 (internal use)
JP9| ON| Provides 5 V power to CN10 (internal use)
JP10| OFF| Closed to enable I2C pull-ups
JP11| Not used| GND
JP12| Not used| GND

Board connectors

11 user connectors are implemented on the STLINK-V3SET product and are described in this paragraph:

  • 2 user connectors are available on the MB1441 board:
    – CN1: STDC14 (STM32 JTAG/SWD and VCP)
    – CN5: USB Micro-B (connection to the host)

  • 9 user connectors are available on the MB1440 board:
    – CN1: STDC14 (STM32 JTAG/SWD and VCP)
    – CN2: Legacy Arm 20-pin JTAG/SWD IDC connector
    –CN3: VCP
    – CN4: SWIM
    – CN5: bridge CAN
    –CN6: SWD
    – CN7, CN8, CN9: bridge
    Other connectors are reserved for internal use and are not described here.

8.1 Connectors on MB1441 board
8.1.1 USB Micro-B
The USB connector CN5 is used to connect the embedded STLINK-V3SET to the PC.

STLINK V3SET Debugger Programmer - Probe top side 10

The related pinout for the USB ST-LINK connector is listed in Table 5.
Table 5. USB Micro-B connector pinout CN5

Pin number Pin name Function
1 VBUS 5 V power
2 DM (D-) USB differential pair M
3 DP (D+) USB differential pair P
4 4ID
5 5GND GND

8.1.2 STDC14 (STM32 JTAG/SWD and VCP)
The STDC14 CN1 connector allows the connection to an STM32 target using the JTAG or SWD protocol, respecting (from pin 3 to pin 12) the ARM10 pinout (Arm Cortex debug connector). But it also advantageously provides two UART signals for the Virtual COM port. The related pinout for the STDC14 connector is listed in Table 6.
Table 6. STDC14 connector pinout CN1

Pin No.| Description| Pin No.|

Description

---|---|---|---
1| Reserved(1)| 2| Reserved(1)
3| T_VCC(2)| 4| T_JTMS/T_SWDIO
5| GND| 6| T_JCLK/T_SWCLK
7| GND| 8| T_JTDO/T_SWO(3)
9| T_JRCLK(4)/NC(5)| 10| T_JTDI/NC(5)
11| GNDDetect(6)| 12| T_NRST
13| T_VCP_RX(7)| 14| T_VCP_TX(2)

  1. Do not connect to the target.
  2. Input for STLINK-V3SET.
  3. SWO is optional, required only for Serial Wire Viewer (SWV) trace.
  4. Optional loopback of T_JCLK on the target side, required if loopback is removed on the STLINK-V3SET side.
  5. NC means not required for the SWD connection.
  6. Tied to GND by STLINK-V3SET firmware; may be used by the target for detection of the tool.
  7. Output for STLINK-V3SET
    The used connector is SAMTEC FTSH-107-01-L-DV-K-A.

8.2 Connectors on MB1440 board
8.2.1 STDC14 (STM32 JTAG/SWD and VCP)
The STDC14 CN1 connector on MB1440 replicates the STDC14 CN1 connector from the MB1441 main module. Refer to Section 8.1.2 for details.
8.2.2 Legacy Arm 20-pin JTAG/SWD IDC connector
The CN2 connector allows the connection to an STM32 target in the JTAG or SWD mode.
Its pinout is listed in Table 7. It is compatible with the pinout of ST- LINK/V2, but the STLINKV3SET does not manage the JTAG TRST signal (pin3).
Table 7. Legacy Arm 20-pin JTAG/SWD IDC connector CN2

Pin number| Description| Pin number|

Description

---|---|---|---
1| T_VCC(1)| 2| NC
3| NC| 4| GND(2)
5| T_JTDI/NC(3)| 6| GND(2)
7| T_JTMS/T_SWDIO| 8| GND(2)
9| T_JCLK/T_SWCLK| 10| GND(2)
11| T_JRCLK(4)/NC(3)| 12| GND(2)
13| T_JTDO/T_SWO(5)| 14| GND(2)
15| T_NRST| 16| GND(2)
17| NC| 18| GND(2)
19| NC| 20| GND(2)

  1. Input for STLINK-V3SET.
  2. At least one of these pins must be connected to the ground on the target side for correct behavior (connecting all is recommended for noise reduction on the ribbon).
  3. NC means not required for the SWD connection.
  4. Optional loopback of T_JCLK on the target side, required if loopback is removed on the STLINK-V3SET side.
  5. SWO is optional, required only for Serial Wire Viewer (SWV) trace.

8.2.3 Virtual COM port connector
The CN3 connector allows the connection of a target UART for the Virtual COM port function. The debug connection (through JTAG/SWD or SWIM) is not required at the same time. However, a GND connection between STLINK-V3SET and target is required and must be ensured in some other way in case no debug cable is plugged. The related pinout for the VCP connector is listed in Table 8.
Table 8. Virtual COM port connector CN3

Pin number

| Description| Pin number|

Description

---|---|---|---
1| T_VCP_TX(1)| 2| T_VCP_RX(2)

8.2.4 SWIM connector
The CN4 connector allows the connection to an STM8 SWIM target. The related pinout for the SWIM connector is listed in Table 9.
Table 9. SWIM connector CN4

Pin number

|

Description

---|---
1| T_VCC(1)
2| SWIM_DATA
3| GND
4| T_NRST

1. Input for STLINK-V3SET.
8.2.5 CAN connector
The CN5 connector allows the connection to a CAN target without a CAN transceiver. The related pinout for this connector is listed in Table 10.

Pin number

|

Description

---|---
1| T_CAN_VCC(1)
2| T_CAN_TX
3| T_CAN_RX

  1. Input for STLINK-V3SET.

8.2.6 WD connector
The CN6 connector allows the connection to an STM32 target in SWD mode through wires. It is not recommended for high performance. The related pinout for this connector is listed in Table 11.
Table 11. SWD (wires) connector CN6

Pin number|

Description

---|---
1| T_VCC(1)
2| T_SWCLK
3| GND
4| T_SWDIO
5| T_NRST
6| T_SWO(2)

  1. Input for STLINK-V3SET.
  2. Optional, required only for Serial Wire Viewer (SWV) trace.

8.2.7 UART/I ²C/CAN bridge connector
Some bridge functions are provided on the CN7 2×5-pin 1.27 mm pitch connector. The related pinout is listed in Table 12. This connector provides CAN logic signals (Rx/Tx), which can be used as input for an external CAN transceiver. Prefer using the MB1440 CN5 connector for CAN connection otherwise.
Table 12. UART bridge connector CN7

Pin number| Description| Pin number|

Description

---|---|---|---
1| UART_CTS| 2| I2C_SDA
3| UART_TX(1)| 4| CAN_TX(1)
5| UART_RX(2)| 6| CAN_RX(2)
7| UART_RTS| 8| I2C_SCL
9| GND| 10| Reserved(3)

  1. TX signals are outputs for STLINK-V3SET, inputs for the target.
  2. RX signals are inputs for STLINK-V3SET, outputs for the target.
  3. Do not connect to the target.

8.2.8 SPI/GPIO bridge connector
Some bridge functions are provided on the CN82x5-pin 1.27 mm pitch connector. The related pinout is listed in Table 13.
Table 13. SPI bridge connector CN8

Pin number| Description| Pin number|

Description

---|---|---|---
1| SPI_NSS| 2| Bridge_GPIO0
3| SPI_MOSI| 4| Bridge_GPIO1
5| SPI_MISO| 6| Bridge_GPIO2
7| SPI_SCK| 8| Bridge_GPIO3
9| GND| 10| Reserved(1)

  1. Do not connect to the target.

8.2.9 Bridge 20-pins connector
All bridge functions are provided on a 2×10-pin connector with a 2.0 mm pitch CN9. The related pinout is listed in Table 14.

Pin number| Description| Pin number|

Description

---|---|---|---
1| SPI_NSS| 11| Bridge_GPIO0
2| SPI_MOSI| 12| Bridge_GPIO1
3| SPI_MISO| 13| Bridge_GPIO2
4| SPI_SCK| 14| Bridge_GPIO3
5| GND| 15| Reserved(1)
6| Reserved(1)| 16| GND
7| I2C_SCL| 17| UART_RTS
8| CAN_RX(2)| 18| UART_RX(2)

Table 14. Bridge connector CN9 (continued)

Pin number| Description| Pin number|

Description

---|---|---|---
9| CAN_TX(3)| 19| UART_TX(3)
10| I2C_SDA| 20| UART_CTS

  1. Do not connect to the target.
  2. RX signals are inputs for STLINK-V3SET, outputs for the target.
  3. TX signals are outputs for STLINK-V3SET, inputs for the target.

Flat ribbons

The STLINK-V3SET provides three flat cables allowing the connection from the STDC14 output to:

  • STDC14 connector (1.27 mm pitch) on target application: pinout detailed in Table 6.
    Reference Samtec FFSD-07-D-05.90-01-N-R.

  • ARM10-compatible connector (1.27 mm pitch) on target application: pinout detailed in Table 15. Reference Samtec ASP-203799-02.

  • ARM20-compatible connector (1.27 mm pitch) on target application: pinout detailed in Table 16. Reference Samtec ASP-203800-02.
    Table 15. ARM10-compatible connector pinout (target side)

Pin No.| Description| Pin No.|

Description

---|---|---|---
1| T_VCC(1)| 2| T_JTMS/T_SWDIO
3| GND| 4| T_JCLK/T_SWCLK
5| GND| 6| T_JTDO/T_SWO(2)
7| T_JRCLK(3)/NC(4)| 8| T_JTDI/NC(4)
9| GNDDetect(5)| 10| T_NRST

  1. Input for STLINK-V3SET.
  2. SWO is optional, required only for Serial Wire Viewer (SWV) trace.
  3. Optional loopback of T_JCLK on the target side, required if loopback is removed on the STLINK-V3SET side.
  4. NC means not required for the SWD connection.
  5. Tied to GND by STLINK-V3SET firmware; may be used by the target for detection of the tool.
    Table 16. ARM20-compatible connector pinout (target side)

Pin No.| Description| Pin No.|

Description

---|---|---|---
1| T_VCC(1)| 2| T_JTMS/T_SWDIO
3| GND| 4| T_JCLK/T_SWCLK
5| GND| 6| T_JTDO/T_SWO(2)
7| T_JRCLK(3)/NC(4)| 8| T_JTDI/NC(4)
9| GNDDetect(5)| 10| T_NRST
11| NC| 12| NC
13| NC| 14| NC
15| NC| 16| NC
17| NC| 18| NC
19| NC| 20| NC

  1. Input for STLINK-V3SET.
  2. SWO is optional, required only for Serial Wire Viewer (SWV) trace.
  3. Optional loopback of T_JCLK on the target side, required if loopback is removed on the STLINK-V3SET side.
  4. NC means not required for the SWD connection.
  5. Tied to GND by STLINK-V3SET firmware; may be used by the target for detection of the tool.

Mechanical information

STLINK V3SET Debugger Programmer - Probe top side 11

Software configuration

11.1 Supporting toolchains (not exhaustive)
Table 17 gives a list of the first toolchain version supporting the STLINK- V3SET product.
Table 17. Toolchain versions supporting STLINK-V3SET

Toolchain| Description|

Minimum Version

---|---|---
STM32CubeProgrammer| ST Programming tool for ST microcontrollers| 1.1.0
SW4STM32| Free IDE on Windows, Linux, and macOS| 2.4.0
IAR EWARM| Third-party debugger for STM32| 8.20
Keil MDK-ARM| Third-party debugger for STM32| 5.26
STVP| ST Programming tool for ST microcontrollers| 3.4.1
STVD| ST Debugging tool for STM8| 4.3.12

Note:
Some of the very first toolchain versions supporting the STLINK-V3SET (in runtime) may not install the complete USB driver for STLINK-V3SET (especially the  TLINK-V3SET bridge USB interface description may miss). In that case, either the user switches to a more recent version of the toolchain, or updates the ST-LINK driver from www.st.com (see Section 11.2).
11.2 Drivers and firmware upgrade
The STLINK-V3SET requires drivers to be installed on Windows and embeds a firmware that needs to be updated from time to time to benefit from new functionality or corrections. Refer to the technical note Overview of ST-LINK derivatives (TN1235) for details.
11.3 STLINK-V3SET frequency selection
The STLINK-V3SET can run internally at 3 different frequencies:

  • high-performance frequency
  • standard frequency, compromising between performance and consumption
  • low-consumption frequency

By default, the STLINK-V3SET starts at a high-performance frequency. It is the responsibility of the toolchain provider to propose or not the frequency selection at the user level.
11.4 Mass-storage interface
The STLINK-V3SET implements a virtual mass-storage interface allowing the programming of an STM32 target flash memory with drag-and-drop action of a binary file from a file explorer. This ability requires the STLINK-V3SET to identify the connected target before enumerating it on the USB host. As a consequence, this functionality is available only if the target is connected to the STLINK-V3SET before the STLINK-V3SET is plugged into the host. This functionality is not available for STM8 targets.
The ST-LINK firmware programs the dropped binary file, at the beginning of the flash, only if it is detected as a valid STM32 application according to the following criteria:

  • the reset vector points to an address in the target flash area,
  • the stack pointer vector points to an address in any of the target RAM areas.

If all these conditions are not respected, the binary file is not programmed and the target flash keeps its initial contents.
11.5 Bridge interface
The STLINK-V3SET implements a USB interface dedicated to bridging functions from USB to SPI/I 2
C/CAN/UART/GPIOs of the ST microcontroller target. This interface is firstly used by STM32CubeProgrammer to allow target programming through SPI/I 2 C/CAN bootloader.
A host software API is provided to extend the use cases.

12.1 Features

  • 65 V to 3.3 V voltage adapter board for STLINK-V3SET
  • Input/output level shifters for STM32 SWD/SWV/JTAG signals
  • Input/output level shifters for VCP Virtual COM port (UART) signals
  • Input/output level shifters for bridge (SPI/UART/I 2 C/CAN/GPIOs) signals
  • Closed casing when using STDC14 connector (STM32 SWD, SWV, and VCP)
  • Connection compatible with STLINK-V3SET adapter board (MB1440) for STM32 JTAG and bridge

12.2 Connection instructions
12.2.1 Closed casing for STM32 debug (STDC14 connector only) with B-STLINK- VOLT

  1. Remove the USB cable from STLINK-V3SET.
  2. Unscrew the casing bottom cover of the STLINK-V3SET or remove the adapter board (MB1440).
  3. Remove the JP1 jumper from the MB1441 main module and place it on the JP1 header of the MB1598 board.
  4. Put the plastic edge in place to guide the B-STLINK-VOLT board connection to the STLINK-V3SET main module (MB1441).
  5. Connect the B-STLINK-VOLT board to the STLINK-V3SET main module (MB1441).
  6. Close the casing bottom cover.

STLINK V3SET Debugger Programmer - Probe top side 12

The STDC14 CN1 connector on the B-STLINK-VOLT board replicates the STDC14 CN1 connector from the MB1441 main module. Refer to Section 8.1.2 for details.
12.2.2 Opened casing for access to all connectors (through MB1440 adapter board) with B-STLINK-VOLT

  1. Remove the USB cable from STLINK-V3SET.
  2. Unscrew the casing bottom cover of the STLINK-V3SET or remove the adapter board (MB1440).
  3. Remove the JP1 jumper from the MB1441 main module and place it on the JP1 header of the MB1598 board.
  4. Put the plastic edge in place to guide the B-STLINK-VOLT board connection to the STLINK-V3SET main module (MB1441).
  5. Connect the B-STLINK-VOLT board to the STLINK-V3SET main module (MB1441).
  6. [optional] Screw the B-STLINK-VOLT board to ensure good and stable contacts.
  7. Plug the MB1440 adapter board into the B-STLINK-VOLT board in the same way it was previously plugged into the STLINK-V3SET main module (MB1441).

STLINK V3SET Debugger Programmer - Probe top side 13

12.3 Selection of bridge GPIO direction
The level-shifter components on the B-STLINK-VOLT board require to manually configure the direction of bridge GPIO signals. This is possible through the SW1 switch on the bottom of the board. Pin1 of SW1 is for bridge GPIO0, pin4 of SW1 is for bridge GPIO3. By default, the direction is target output/ST-LINK input (selectors on ON/CTS3 side of SW1). It can be changed for each GPIO independently into the target input/ST-LINK output direction by moving the corresponding selector on the ‘1’, ‘2’, ‘3’, or ‘4’ side of SW1. Refer to Figure 18.

STLINK V3SET Debugger Programmer - Probe top side 14

12.4 Jumper configuration
Caution: Always remove the JP1 jumper from the STLINK-V3SET main module (MB1441) before stacking the B-STLINK-VOLT board (MB1598). This jumper can be used on the MB1598 board to provide the return JTAG clock required for correct JTAG operations. If the JTAG clock loopback is not done at the B-STLINK-VOLT board level through JP1, it must be done externally between CN1 pins 6 and 9.
Table 18. MB1598 jumper configuration

Jumper| State|

Description

---|---|---
JP1| ON| JTAG clock loopback done on board

12.5 Target voltage connection
The target voltage must always be provided to the board for proper operation (input for B-STLINK-VOLT). It must be provided to pin 3 of the CN1 STDC14 connector, either directly on MB1598 or through the MB1440 adapter board. In case of use with the MB1440 adapter board, the target voltage can be provided either through the pin3 of CN1, pin1 of CN2, pin1 of CN6, or pin2 and pin3 of JP10 of the MB1440 board. The expected range is 1.65 V 3.3 V.
12.6 Board connectors
12.6.1 STDC14 (STM32 JTAG/SWD and VCP)
The STDC14 CN1 connector on the MB1598 board replicates the STDC14 CN1 connector
from the MB1441 board. Refer to Section 8.1.2 for details.
2 12.6.2 UART/I C/CAN bridge connector
 The UART/I² C/CAN bridge CN7 connector on the MB1598 board replicates the 2 UART/I ²C/CAN bridge CN7 connector from the MB1440 board. Refer to Section 8.2.7 for details.
12.6.3 SPI/GPIO bridge connector
The SPI/GPIO bridge CN8 connector on the MB1598 board replicates the SPI/GPIO bridge CN8 connector from the MB1440 board. Refer to Section 8.2.8 for details.

13.1 Features

  • 65 V to 3.3 V voltage adapter and galvanic isolation board for STLINK-V3SET
  • 5 kV RMS galvanic isolation
  • Input/output isolation and level shifters for STM32 SWD/SWV/JTAG signals
  • Input/output isolation and level shifters for VCP Virtual COM port (UART) signals
  • Input/output isolation and level shifters for bridge (SPI/UART/I 2 C/CAN/GPIOs) signals
  • Closed casing when using STDC14 connector (STM32 SWD, SWV, and VCP)
  • Connection compatible with STLINK-V3SET adapter board (MB1440) for STM32 JTAG and bridge

13.2 Connection instructions
13.2.1 Closed casing for STM32 debug (STDC14 connector only) with B-STLINK- ISOL

  1. Remove the USB cable from STLINK-V3SET.
  2. Unscrew the casing bottom cover of the STLINK-V3SET or remove the adapter board (MB1440).
  3. Remove the JP1 jumper from the MB1441 main module and place it on the JP2 header of the MB1599 board.
  4. Put the plastic edge in place to guide the B-STLINK-ISOL board connection to the STLINK-V3SET main module (MB1441).
  5. Connect the B-STLINK-ISOL board to the STLINK-V3SET main module (MB1441).
  6. Close the casing bottom cover.

STLINK V3SET Debugger Programmer - Probe top side 15

The STDC14 CN1 connector on the B-STLINK-ISOL board replicates the STDC14 CN1 connector from the MB1441 main module. Refer to Section 8.1.2 for details.
13.2.2 Opened casing for access to all connectors (through MB1440 adapter board) with B-STLINK-ISOL

  1. Remove the USB cable from STLINK-V3SET

  2. Unscrew the casing bottom cover of the STLINK-V3SET or remove the adapter board (MB1440)

  3. Remove the JP1 jumper from the MB1441 main module and place it on the JP2 header of the MB1599 board

  4. Put the plastic edge in place to guide the B-STLINK-ISOL board connection to the STLINK-V3SET main module (MB1441)

  5. Connect the B-STLINK-ISOL board to the STLINK-V3SET main module (MB1441)
    Caution: Do not screw the B-STLINK-ISOL board to the STLINK-V3SET main module with a metal screw. Any contact of the MB1440 adapter board with this screw short-circuits the grounds and may cause damages.

  6. Plug the MB1440 adapter board into the B-STLINK-ISOL board in the same way it was previously plugged into the STLINK-V3SET main module (MB1441)

STLINK V3SET Debugger Programmer - Probe top side 15

For connector description, refer to Section 8.2.
13.3 Bridge GPIO direction
On the B-STLINK-ISOL board the direction of bridge GPIO signals are fixed by hardware:

  • GPIO0 and GPIO1 are the target input and ST-LINK output.
  • GPIO2 and GPIO3 are the target output and ST-LINK input.

13.4 Jumper configuration
Jumpers on the B-STLINK-ISOL board (MB1599) are used to configure the return JTAG clock path required for correct JTAG operations. The highest is the JTAG clock frequency, the closest to the target must be the loopback.

  1. Loopback is done at STLINK-V3SET main module (MB1441) level: MB1441 JP1 is ON, while MB1599 JP2 is OFF.
  2. Loopback is done at B-STLINK-ISOL board (MB1599) level: MB1441 JP1 is OFF (very important to not potentially degrade the MB1599 board), while MB1599 JP1 and JP2 are ON.
  3. Loopback is done at the target level: MB1441 JP1 OFF (very important to not potentially degrade the MB1599 board), MB1599 JP1 is OFF and JP2 is ON. Loopback is done externally between CN1 pins 6 and 9.

Caution: Always ensure that either the JP1 jumper from the STLINK-V3SET main module (MB1441), or the JP2 jumper from the B-STLINK-ISOL board (MB1599) is OFF, before stacking them.
13.5 Target voltage connection
The target voltage must always be provided to the board to work correctly (input for BSTLINK-ISOL).
It must be provided to  pin 3 of the CN1 STDC14 connector, either directly on MB1599 or  through the MB1440 adapter board. In case of use with the MB1440 adapter board, the target voltage can be provided either through pin 3 of CN1, pin 1 of CN2, pin 1 of CN6, or pin 2 and pin 3 of JP10 of the MB1440 board. The expected range is 1,65 V to 3,3 V.
13.6 Board connectors
13.6.1 STDC14 (STM32 JTAG/SWD and VCP )
The STDC14 CN1 connector on the MB1599 board replicates the STDC14 CN1 connector from the MB1441 main module. Refer to Section 8.1.2 for details.
13.6.2 UART/I C/CAN bridge connector
The UART/I²C/CAN bridge CN7 connector on the MB1599 board replicates the UART/I2C/CAN bridge CN7 connector from the MB1440 board. Refer to Section 8.2.7 for details.
13.6.3 SPI/GPIO bridge connector
The SPI/GPIO bridge CN8 connector on the MB1599 board replicates the SPI/GPIO bridge CN8 connector from the MB1440 board. Refer to Section 8.2.8 for details.

Performance figures

14.1 Global overview
Table 19 gives an overview of the achievable maximal performances with the STLINKV3SET on different communication channels. Those performances are also depending on the overall system context (target included), so they are not guaranteed to be always reachable. For instance, a noisy environment or the connection quality can impact system performance.
Table 19. Achievable maximal performance with STLINK-V3SET on different channels
14.2 Baud rate computing
Some interfaces (VCP and SWV) are using the UART protocol. In that case, the baud rate of STLINK-V3SET must be aligned as much as possible with the target one.
Below is a rule allowing to compute the baud rates achievable by the STLINK- V3SET probe:

  • In high-performance mode: 384 MHz / prescaler with prescaler = [24 to 31] then 192 MHz / prescaler with prescaler = [16 to 65535]
  • In standard mode: 192 MHz/prescaler with prescaler = [24 to 31] then 96 MHz / prescaler with prescaler = [16 to 65535]
  • In low consumption mode: 96 MHz / prescaler with prescaler = [24 to 31] then 48 MHz / prescaler with prescaler = [16 to 65535] Note that the UART protocol does not guaranty the data delivery (all the more without hardware flow control). Consequently, at high frequencies, the baud rate is not the only parameter impacting the data integrity. The line load rate and the capability for the receiver to process all the data also affect the communication. With a heavily loaded line, some data loss may occur at the STLINK-V3SET side above 12 MHz.

15.1 Product marking
The stickers located on the top or bottom side of the PCB provide product information:
• Product order code and product identification for the first sticker
• Board reference with revision, and serial number for the second sticker On the first sticker, the first line provides the product order code, and the second line the product identification.
On the second sticker, the first line has the following format: “MBxxxx- Variant-yzz”, where “MBxxxx” is the board reference, “Variant” (optional) identifies the mounting variant when several exist, “y” is the PCB revision and “zz” is the assembly revision, for example B01.
The second line shows the board serial number used for traceability.
Evaluation tools marked as “ES” or “E” are not yet qualified and therefore not ready to be used as reference design or in production. Any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering sample tools as reference designs or in production.
“E” or “ES” marking examples of location:

  • On the targeted STM32 that is soldered on the board (For an illustration of STM32 marking, refer to the STM32 datasheet “Package information” paragraph at the
    www.st.com website).

  • Next to the evaluation tool ordering part number that is stuck or silk-screen printed on the board.

15.2 STLINK-V3SET product history
15.2.1 Product identification LKV3SET$AT1
This product identification is based on the MB1441 B-01 main module and MB1440 B-01 adapter board.
Product limitations
No limitation is identified for this product identification.
15.2.2 Product identification LKV3SET$AT2
This product identification is based on the MB1441 B-01 main module and MB1440 B-01 adapter board, with cable for bridge signals out of the CN9 MB1440 adapter board connector.
Product limitations
No limitation is identified for this product identification.
15.3 B-STLINK-VOLT product history
15.3.1 Product
identification BSTLINKVOLT$AZ1
This product identification is based on the MB1598 A-01 voltage adapter board.
Product limitations
No limitation is identified for this product identification.
15.4 B-STLINK-ISOL product history
15.4.1 Product identification BSTLINKISOL$AZ1
This product identification is based on the MB1599 B-01 voltage adapter and galvanic isolation board.
Product limitations
Do not screw the B-STLINK-ISOL board to the STLINK-V3SET main module with a metal screw, especially if you intend to use the MB1440 adapter board. Any contact of the MB1440 adapter board with this screw short-circuits the grounds and may cause damages.
Use only nylon fastener screws or do not screw.
15.5 Board revision history
15.5.1 Board MB1441 revision B-01
The revision B-01 is the initial release of the MB1441 main module.
Board limitations
No limitation is identified for this board revision.
15.5.2 Board MB1440 revision B-01
The revision B-01 is the initial release of the MB1440 adapter board.
Board limitations
No limitation is identified for this board revision.
15.5.3 Board MB1598 revision A-01
The revision A-01 is the initial release of the MB1598 voltage adapter board.
Board limitations
The target voltage cannot be provided through bridge connectors CN7 and CN8 while required for bridge functions. The target voltage must be provided either through CN1 or through the MB1440 adapter board (refer to Section 12.5: Target voltage connection).
15.5.4 Board MB1599 revision B-01

The revision B-01 is the initial release of the MB1599 voltage adapter and galvanic isolation board.
Board limitations
The target voltage cannot be provided through bridge connectors CN7 and CN8 while required for bridge functions. The target voltage must be provided either through CN1 or through the MB1440 adapter board. Refer to Section 13.5: Target voltage connection.
Do not screw the B-STLINK-ISOL board to the STLINK-V3SET main module with a metal screw, especially if you intend to use the MB1440 adapter board. Any contact of the MB1440 adapter board with this screw short-circuits the grounds and may cause damages. Use only nylon fastener screws or do not screw.
Appendix A Federal Communications Commission (FCC)
15.3 FCC Compliance Statement
15.3.1 Part 15.19
Part 15.19
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

  1. this device may not cause harmful interference, and
  2. this device must accept any interference received, including interference that may cause undesired operation.

Part 15.21
Any changes or modifications to this equipment not expressly approved by STMicroelectronics may cause harmful interference and void the user’s authority to operate this equipment.
Part 15.105
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instruction, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on, the user is encouraged to try to correct interference by one or more of the following measures:

  • Reorient or relocate the receiving antenna.
  • Increase the separation between the equipment and receiver.
  • Connect the equipment into an outlet on circuit different from that to which the receiver is connected.
  • Consult the dealer or an experienced radio/TV technician for help.

Note: Use a USB cable with a length lower than 0.5 m and ferrite on the PC’s side.
Other certifications

  • EN 55032 (2012) / EN 55024 (2010)
  • CFR 47, FCC Part 15, Subpart B (Class B Digital Device) and Industry Canada ICES003 (Issue 6/2016)
  • Electrical Safety qualification for CE marking: EN 60950-1 (2006+A11/2009+A1/2010+A12/2011+A2/2013)
  • IEC 60650-1 (2005+A1/2009+A2/2013)

Note:
The sample examined must be powered by a power supply unit or auxiliary equipment complying with standard EN 60950-1: 2006+A11/2009+A1/2010+A12/2011+A2/2013, and must be Safety Extra Low Voltage (SELV) with limited power capability.
Revision history
Table 20. Document revision history

Date Revision Changes
6-Sep-18 1 Initial release.
8-Feb-19 2 Updated:

— Section 8.3.4: Virtual COM port (VCP), — Section 8.3.5: Bridge functions,
— Section 9.1.2: STDC14 (STM32 JTAG/SWD and VCP), and
— Section 9.2.3: Virtual COM port connector explaining
how Virtual COM ports are connected to the target.
20-Nov-19| 3| Added:
— Second Virtual COM port chapter in Introduction,
— Figure 13 in Section 8.3.5 Bridge UART, and
— Figure 15 in the new section of Mechanical information.
19-Mar-20| 4| Added:
— Section 12: B-STLINK-VOLT board extension description.
5-Jun-20| 5| Added:
— Section 12.5: Target voltage connection and — Section 12.6: Board connectors.
Updated:
— Section 1: Features,
— Section 3: Ordering information,
— Section 8.2.7: UART/l2C/CAN bridge connector, and — Section 13: STLINK-V3SET and B-STLINK-VOLT information.
5-Feb-21| 6| Added:
– Section 13: B-STLINK-ISOL board extension description,
– Figure 19 and Figure 20, and
– Section 14: Performance figures. Updated:
– Introduction,
– Ordering information,
– Figure 16 and Figure 17, and
– Section 15: STLINK-V3SET, B-STLINK-VOLT, and BSTLINK-ISOL information. All modifications linked to the latest B-STLINK-ISOL  board for
voltage adaptation and galvanic isolation
7-Dec-21| 7| Added:
– Section 15.2.2: Product identification LKV3SET$AT2 and
– Reminder not to use metal screws to avoid damages in Figure 20, Section 15.4.1, and Section 15.5.4. Updated:
– Features,
– System requirements, and
– Section 7.3.4: Virtual COM port (VCP).

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