RICHTEK RT9834 Micro Power Voltage Detector with Manual Reset User Manual

RICHTEK RT9834 Micro Power Voltage Detector with Manual Reset

Product Information

Specifications

• Product Name: RT9834 Micro-Power Voltage Detector with Manual Reset
• Functional Supply Voltage: 0.9V
• Output Type: CMOS Push-Pull
• Packages: SC-82, SOT-143
• Compliance: RoHS Compliant, Halogen Free

Product Usage Instructions

Pin Configuration

The product has the following pin configuration:

• Pin 1: GND (Ground)
• Pin 2: RESET (Active Low Push-Pull Reset Output)
• Pin 3: RESET (Active High Push-Pull Reset Output)
• Pin 4: MR (Manual Reset)
• Pin 5: VDD (Power)

Functional Block Diagram

The product’s functional block diagram includes components like Timer, VSET, CMP, and POR for various operations.

Operation

The product operation involves the Timer providing delay time options, VSET generating a fixed threshold voltage, CMP comparing voltages, and POR ensuring the right state at power on.

FAQ

• What are the different package types available for RT9834?
  • The RT9834 is available in SOT-143 and SC-82 package types.
• What is the purpose of the Manual Reset (MR) pin?
  • The MR pin is used for manual reset functionality in the product.

General Description

The RT9834 is a micro-power voltage detector with deglitched manual reset input supervising the power supply voltage level for microprocessors (μP) or digital systems. It provides internally fixed threshold levels with 0.1V per step ranging from 1.2V to 5V, which covers most digital applications. It features low supply current of 3μA. The RT9834 performs supervisory function by sending out a reset signal whenever the VDD voltage falls below a preset threshold level. This reset signal will last the whole period before VDD recovers. Once VDD recovers crossing the threshold level, the reset signal will be released after a certain delay time. To pull reset signal low manually, just pull the manual reset input (MR) below the specified VIL level. The RT9834 is available in the SC-82 and SOT-143 packages.

Marking Information

For marking information, contact our sales representative directly or through a Richtek distributor located in your area.

Features

• Internally Fixed Threshold 1.2V to 5V in 0.1V Step
• High Accuracy ±1.5%
• Low Supply Current 3μA
• No External Components Required
• Quick Reset within 20μs
• Built-in Recovery Delay : 0ms, 55ms, 220ms, 450ms Options
• Low Functional Supply Voltage 0.9V
• CMOS Push-Pull Output
• Small SC-82 and SOT-143 Packages
• RoHS Compliant and Halogen Free

Applications

• Computers
• Controllers
• Intelligent Instruments
• Critical μP and μC Power Monitoring
• Portable/Battery-Powered Equipment

Simplified Application Circuit

Ordering Information

Pin Configuration

Note :

Richtek products are :

• RoHS is compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
• Suitable for use in SnPb or Pb-free soldering processes

Part Status

The part status values are defined as below :

• Active: Device is in production and is recommended for new designs.
• Lifebuy: The device will be discontinued, and a lifetime-buy period is in effect.
• NRND: Not recommended for new designs.
• Preview: Device has been announced but is not in production.
• EOL: Richtek has discontinued the production of the device

Functional Pin Description

2

| ****

RESET

| Active Low Push-Pull Reset Output.
RESET| Active High Push-Pull Reset Output.
3| ****

MR

| Manual Reset.
4| VDD| Power.

Functional Block Diagram

Operation

When VDD is lower than the threshold voltage set by VSET circuit, the RESET output becomes high. If VDD remains higher than the threshold voltage with a hysteresis voltage, Timer will be active. After a specific delay time, the RESET output becomes low. There is an internal pull-high resistor connected to the MR pin. MR resets the RT9834 only when it is pulled low. When MR releases and waits for a delay time, output returns to its normal state related to VDD. The RESET pin is a Pull-Push output, and it will pull the output high to VDD, low to Ground. Adding a pullhigh resistor tied to any power which higher than VDD is forbidden.

• Timer
  • The Timer provides four kinds of delay time options including 0ms, 55ms, 220ms, and 450ms.
• VSET
  • The VSET generates a fixed threshold voltage.
• CMP
  • Voltage Comparator which compares the voltage difference between threshold voltage and VDD.
• POR
  • Power on reset. It will set all digital logic to the right state when power on.

Absolute Maximum Ratings (Note 1)

• Terminal Voltage (with Respect to GND)
  • VDD ——————————————————————————————————————— −0.3V to 6V
• All Other Inputs —————————————————————————————————– −0.3V to (VDD + 0 .3V)
• Input Current, IVDD ————————————————————————————————–20mA
• Power Dissipation, PD @ TA = 25°C
  • SOT-143 ————————————————————————————————————–0.44W
  • SC-82 —————————————————————————————————————–0.29W
• Package Thermal Resistance (Note 2)
  • SOT-143, θJA ——————————————————————————————————— 228.1°C/W
  • SC-82, θJA ———————————————————————————————————— 345.6°C/W
• Lead Temperature (Soldering, 10sec.) ————————————————————————-260°C
• Storage Temperature Range ————————————————————————————- −65°C to 125°C
• ESD Susceptibility (Note 3)
• HBM (Human Body Model) —————————————————————————————2kV

Recommended Operating Conditions (Note 4)

• Junction Temperature Range————————————————————————————- −40°C to 125°C
• Ambient Temperature Range————————————————————————————- −40°C to 85°C

Electrical Characteristics

(VDD = 3V, TA = 25°C, unless otherwise specified)

Parameter| Symbol| Test Conditions| Min| Typ| Max| Unit
---|---|---|---|---|---|---

Operating VDD ( VOUT) Range

|

VDD

| RT9834A/B/C/D| 0.9| —| 6|

V

RT9834E/F/G/H| 1.1| —| 6
Supply Current| IDD| VTH = 3V, VDD = 4.5V| —| 3| 8| mA
Reset Threshold| VTH|  | —| 1.2 to 5| —| V
Threshold Voltage Accuracy| DVTH|  | -1.5| —| 1.5| %
Threshold Voltage Hysteresis| VHYS|  | —| 0.01 VTH| —| V
VDD Drop to Reset Delay| tRD| Drop = VTH -125mV| —| 20| —| ms

Reset Active Timeout Period

| RT9834A/E|

tRP

|

VDD ³ 1.02 x VTH

| —| 0| —|

ms

RT9834B/F| 35| 55| 75
RT9834C/G| 143| 220| 297
RT9834D/H| 292| 450| 608

RESET Output Voltage Low

|

VOL

| VDD < VTH(MIN) ,ISINK = 3.5mA, VTH ³ 3V| —| —| 0.4|

V

VDD < VTH(MIN) ,ISINK = 1.2mA,

VTH ³ 1.8V

| —| —| 0.3
VTH(MIN) > VDD > 1V,

ISINK = 0.5mA

| —| —| 0.3
Parameter| Symbol| Test Conditions| Min| Typ| Max| Unit
---|---|---|---|---|---|---

RESET Output Voltage High

|

VOH

| VDD > VTH(MAX),

ISOURCE = 800mA, VTH ³ 3V

| VDD – 1.5| —| —|

V

VDD > VTH(MAX),

ISOURCE = 500mA, VTH ³ 1.8V

| 0.8 VDD| —| —
VDD > VTH(MAX),

ISOURCE = 200mA, VTH ³ 1.1V

| 0.8 VDD| —| —

RESET Output Voltage Low

|

VOL

| VDD > VTH(MAX), ISINK = 3.5mA, VTH ³ 3V| —| —| 0.4|

V

VDD > VTH(MAX), ISINK = 1.2mA, VTH ³ 1.8V| —| —| 0.3
VDD > VTH(MAX), ISINK = 0.5mA, VTH ³ 1.2V| —| —| 0.3

RESET Output Voltage High

|

VOH

| 1.1V < VDD < VTH(MIN), ISOURCE = 200mA| 0.8 VDD| —| —|

V

1.8V < VDD < VTH(MIN), ISOURCE = 500mA| 0.8 VDD| —| —
3V < VDD < VTH(MIN), ISOURCE = 800mA| VDD – 1.5| —| —

MR Active Timeout Period

| RT9834A/E|

tMR

|  | —| 0| —|

ms

RT9834B/F| 35| 55| 75
RT9834C/G| 143| 220| 297
RT9834D/H| 292| 450| 608
MR Input Voltage Threshold| Logic-High| VMR_H| VDD > VTH(MAX)| 0.75 x VDD| —| VDD| V
Logic-Low| VMR_L| VDD > VTH(MAX)| —| —| 0.25 x VDD

• Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.
• Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
• Note 3. Devices are ESD-sensitive. Handling precautions is recommended.
• Note 4. The device is not guaranteed to function outside its operating conditions

Typical Application Circuit

Typical Operating Characteristics

Application Information

Operation Timing Diagram

The VDD and RESET voltage rising and falling of the IC can be explained in five steps as Figure 1.

1. RESET voltage is pulled up to VDD voltage.
2. When the VDD voltage is down to the detector threshold voltage (Point A), RESET voltage becomes low level.
3. When the VDD voltage is lower than the minimum operating voltage, the RESET voltage is indefinite. In this case, the RESET voltage will stay at low level.
4. RESET voltage keeps in low level.
5. When the VDD voltage exceeds the threshold voltage (Point B). The RESET voltage will go high after a delay time.

Manual Reset Control

Many processor-based products require manual reset capability, allowing the user or external logic circuitry to initiate a reset. A logic low on MR asserts reset. Reset remains asserted while MR is low and for the reset timeout period after MR returns high. Connect a normally open momentary switch from MR to ground to create a manual reset function.

Benefits of Highly Accurate Reset Threshold

Most μP supervisor ICs have reset threshold voltages between 1% and 1.5% below the value of nominal supply voltages. This ensures a reset will not occur within 1% of the nominal supply, but will occur when the supply is 1.5% below nominal.

Thermal Considerations

For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula :

• PD(MAX) = (TJ(MAX) − TA) / θJA

where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout-dependent. For the SOT-143 package, the thermal resistance, θJA, is 228.1°C/ W on a standard JEDEC 51-7 four-layer thermal test board. SC-82 package, the thermal resistance, θJA, is 345.6°C/ W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula :

• PD(MAX) = (125°C − 25°C) / (228.1°C/W) = 0.44W for SOT-143 package
• PD(MAX) = (125°C − 25°C) / (345.6°C/W) = 0.29W for SC-82 package

The maximum power dissipation depends on the operating ambient temperature for fixed TJ(MAX) and thermal resistance, θJA. The derating curve in Figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation.

Outline Dimension

SOT-143 Surface Mount Package

Symbol

| Dimensions In Millimeters| Dimensions In Inches
---|---|---
Min| Max| Min| Max
A| 0.800| 1.200| 0.031| 0.047
A1| 0.050| 0.150| 0.002| 0.006
B| 1.200| 1.400| 0.047| 0.055
b| 0.300| 0.520| 0.012| 0.020
b1| 0.760| 0.920| 0.030| 0.036
C| 2.100| 2.640| 0.083| 0.104
D| 2.800| 3.040| 0.110| 0.120
e| 1.900| 0.075
H| 0.080| 0.150| 0.003| 0.006
L| 0.210| 0.410| 0.008| 0.016

SC-82 Surface Mount Package

Symbol

| Dimensions In Millimeters| Dimensions In Inches
---|---|---
Min| Max| Min| Max
A| 0.800| 1.100| 0.031| 0.043
A1| 0.000| 0.100| 0.000| 0.004
B| 1.150| 1.350| 0.045| 0.053
b| 0.150| 0.400| 0.006| 0.016
b1| 0.350| 0.500| 0.014| 0.020
C| 1.800| 2.450| 0.071| 0.096
D| 1.800| 2.200| 0.071| 0.087
e| 1.300| 0.051
H| 0.080| 0.260| 0.003| 0.010
L| 0.200| 0.460| 0.008| 0.018

Richtek Technology Corporation

5F, No. 20, Taiyuan Street, Chupei City Hsinchu, Taiwan, R.O.C.

• Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries

Datasheet Revision History

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References

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