STMicroelectronics STS10DN3LH5 STripFET V Power MOSFET Owner’s Manual

June 16, 2024
STMicroelectronics

STMicroelectronics STS10DN3LH5 STripFET V Power MOSFET Owner’s Manual

Features

Type V DSS R DS(on) max I D
STS10DN3LH5 30 V 0.021 W 10 A
  • RDS(on) * Qg industry benchmark
  • Extremely low on-resistance RDS(on)
  • Very low switching gate charge
  • High avalanche ruggedness
  • Low gate drive power losses

Application

  • Switching applications

Description

This STripFET™V Power MOSFET technology is among the latest improvements, which have been especially tailored to achieve very low on-state resistance providing also one of the best-in-class FOM.

Figure 1. Internal schematic diagram

Table 1. Device summary

Order codes Marking Package Packaging
STS10DN3LH5 10DD3L SO-8 Tape and reel

Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit
VDS Drain-source voltage (VGS = 0) 30 V
VGS Gate-Source voltage ± 22 V
ID (1) Drain current (continuous) at TC = 25 °C 10 A
ID Drain current (continuous) at TC = 100 °C 7 A
IDM (2) Drain current (pulsed) 40 A
PTOT Total dissipation at TC = 25 °C 2.5 W
Derating factor 0.02 W/°C
EAS (3) Single pulse avalanche energy 50 mJ
TJTstg Operating junction temperature Storage temperature – 55 to 150 °C
  1. Limited by wire bonding
  2. Pulse width limited by safe operating area
  3. Starting TJ = 25 °C, ID = 21 A, L= 0.2 mH

Table 3. Thermal resistance

Symbol Parameter Value Unit
RthJC Thermal resistance junction-case max 50 °C/W
RthJA Thermal resistance junction-case max 100 °C/W
TJ Maximum lead temperature for soldering purpose 275 °C

Electrical characteristics

(TCASE = 25 °C unless otherwise specified)

Table 4. Static

Symbol| Parameter| Test conditions| Min.| Typ.| Max.| Unit
---|---|---|---|---|---|---
V(BR)DSS| Drain-source breakdown Voltage| ID = 250 µA, VGS= 0| 30| | | V
IDSS| Zero gate voltage drain current (VGS = 0)| VDS = 30 VVDS = 30 V, Tc = 125 °C| | | 110| µA µA
IGSS| Gate body leakage current(VDS = 0)| VGS = ± 22 V| | | ±100| nA
VGS(th)| Gate threshold voltage| VDS = VGS, ID = 250 µA| 1| | | V
RDS(on)| Static drain-source on resistance| VGS = 10 V, ID= 5 A| | 0.019| 0.021| W
VGS = 4.5 V, ID= 5 A| | 0.023| 0.028| W

Table 5. Dynamic

Symbol| Parameter| Test conditions| Min| Typ.| Max.| Unit
---|---|---|---|---|---|---
Ciss Coss Crss| Input capacitance Output capacitanceReverse transfer capacitance| VDS = 25 V, f = 1 MHz, VGS = 0| –| 4759719| –| pF pF pF
Qg| Total gate charge| VDD = 15 V, ID = 10 A| | 4.6| | nC
Qgs| Gate-source charge| VGS = 5 V| –| 1.7| –| nC
Qgd| Gate-drain charge| (Figure 14)| | 1.9| | nC
Qgs1
Qgs2| Pre Vth gate-to-source chargePost Vth gate-to- source charge| VDD = 15 V, ID = 10A VGS = 5 V (Figure 19)| –| 0.67 0.84| –| nC nC
**** RG| **** Gate input resistance| f = 1 MHz gate bias Bias = 0 test signal level = 20 mVopen drain| **** –| **** 2.5| **** –| **** W

Table 6. Switching on/off (resistive load)

Symbol| Parameter| Test conditions| Min.| Typ.| Max.| Unit
---|---|---|---|---|---|---
td(on) tr| Turn-on delay time Rise time| VDD = 15 V, ID = 5 A,RG = 4.7 W, VGS = 10 V (Figure 13 and Figure 18)| –| 422| –| ns ns
td(off) tf| Turn-off delay time Fall time| VDD = 15 V, ID = 5 A,RG = 4.7 W, VGS = 10 V (Figure 13 and Figure 18)| –| 132.8| –| ns ns

Table 7. Source drain diode

Symbol| Parameter| Test conditions| Min.| Typ.| Max.| Unit
---|---|---|---|---|---|---
ISD ISDM (1)| Source-drain current Source-drain current (pulsed)| | –| | 1040| A A
VSD| Forward on voltage| ISD = 5 A, VGS = 0| –| | 1.1| V
trr Qrr| Reverse recovery time Reverse recovery charge| ISD = 10 A, VDD = 25 Vdi/dt = 100 A/µs,|
–| 16.27.8| | ns nC
IRRM| Reverse recovery current| (Figure 15)| | 1| A

  1. Pulsed: pulse duration = 300 µs, duty cycle 1.5 %

Electrical characteristics (curves)

**Figure 2. Safe operating area

**

**Figure 3. Thermal impedance

**

**Figure 4. Output characteristics

**

**Figure 5. Transfer characteristics

**

**Figure 6. Normalized BVDSS vs temperature

**

**Figure 7. Static drain-source on resistance

**

**Figure 8. Gate charge vs gate-source voltage

**

**Figure 9. Capacitance variations

**

**Figure 10. Normalized gate threshold voltage vs temperature

**

**Figure 11. Normalized on resistance vs temperature

**

**Figure 12. Source-drain diode forward characteristics

**

Test circuits

Figure 13. Switching times test circuit for resistive load

Figure 14. Gate charge test circuit

Figure 15. Test circuit for inductive load switching and diode recovery times

Figure 16. Unclamped inductive load test circuit

Figure 17. Unclamped inductive waveform

Figure 18. Switching time waveform

**Figure 19. Gate charge waveform

**

Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

SO-8 MECHANICAL DATA

DIM. mm. inch
MIN. TYP MAX.
A
a1 0.1
a2
a3 0.65
b 0.35
b1 0.19
C 0.25
c1 45 (typ.)
D 4.8
E 5.8
e 1.27
e3 3.81
F 3.8
L 0.4
M
S 8 (max.)

Revision history

Table 8. Document revision history

Date Revision Changes
12-May-2009 1 First release

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