WIZnet WizFi360 Hardware Design User Guide
- June 12, 2024
- WIZnet
Table of Contents
WizFi360 Hardware Design Guide
(Version 1.04)
WizFi360 Hardware Design
http://www.wiznet.io
© Copyright 2022 WIZnet Co., Ltd. All rights reserved
Document Revision History
Date | Revision | Changes |
---|---|---|
2019-09-02 | 1.0 | Initial Release |
2019-09-03 | 1.01 | Edited “Figure 5. UART Level Shifter” |
2019-09-20 | 1.02 | Added “4. PCB Footprint” |
Edited “Figure 2. Reference Schematic”
2019-11-27| 1.03| Edited “Figure 1. WizFi360 Pinout”
Edited “Table 1. Pin Definitions”
Added “3.4 SPI”
2022-06-30| 1.04| Edited “Figure 1. WizFi360 Pinout”
Edited “Figure 1. Reference Schematic”
Edited “Figure 2. UART”
Edited “Figure 3. SPI Interface”
Edited “Figure 4. UART Flow Control”
Overview
This document is the WizFi360 hardware design guide. If you are designing hardware using the WizFi360 you must refer to this document. This document includes a reference circuit diagram and a PCB guide.
Pin Definitions
Figure 5. WizFi360 Pinout
Pin Name | Type | Pin Function |
---|---|---|
RST | I | Module Reset Pin (Active Low) |
NC | – | Reserved |
PA0 | I/O | BOOT Pin (Active low) |
When power on or reset is low, it operates in Boot mode.
In the normal operating mode, this pin can be controlled by AT command.
WP| I| WAKEUP Pin (Active High)
If the wake-up pin is high in Standby mode, the WizFi360 is reset to the
normal operating mode.
PA1| I| Pull down over 3s for taking effect.
UART1’s current parameter changes to default value (please refer to the
AT+UART_CUR command in WizFi360 AT command manual).
PB6| I/O| This pin can be controlled by AT command.
PB9| I| CTS Pin of UART1
If you don’t use the CTS function, this pin can be controlled by AT command.
VCC| P| Power Pin (Typical Value 3.3V)
PB15| I/O| CSn Pin of SPI
If you don’t use the SPI function, this pin can be controlled by AT command.
PB18| I/O| MISO Pin of SPI
If you don’t use the SPI function, this pin can be controlled by AT command.
PB13/ SPI_EN| I/O| Enable Pin of SPI
When power is applied or reset, this pin is checked to set the module mode.
High or NC – UART Mode (Default)
Low – SPI Mode
PB14| I/O| INTn Pin of SPI
If you don’t use the SPI function, this pin can be controlled by AT command.
PB17| I/O| MOSI Pin of SPI
If you don’t use the SPI function, this pin can be controlled by AT command.
PB16| I/O| CLK Pin of SPI
If you don’t use the SPI function, this pin can be controlled by AT command.
GND| I/O| Ground Pin
PB10| O| RTS Pin of UART1
If you don’t use the RTS function, this pin can be controlled by AT command.
TXD0| O| TXD Pin of UART0
RXD0| I| RXD Pin of UART0
PB7| O| LED Light output (Active low). Go to Low while each TX/RX packet and
then back to high.
Note: It has been connected to onboard LED for WizFi360-PA
PB8| I/O| This pin can be controlled by AT command.
RXD1| I| RXD Pin of UART1
TXD1| O| TXD Pin of UART1
Table 1. Pin Definitions
*Note: UART1 is used for AT command and data communication. UART0 is used
for debugging and firmware upgrade.
2.1. Initial Value of GPIO Pins
This is the initial value of GPIO when using AT command to use GPIO on the
WizFi360.
Pin Name | Type | Value | Pull up / Pull down |
---|---|---|---|
PA0 | I/O | High | Pull up |
PB6 | I/O | Low | Pull down |
PB9 | I/O | Low | Pull down |
PB15 | I/O | High | Pull down |
PB18 | I/O | High | Pull down |
PB13 | I/O | High | Pull down |
PB14 | I/O | High | Pull down |
PB17 | I/O | High | Pull down |
PB16 | I/O | High | Pull down |
PB10 | I/O | Low | Pull down |
PB07 | I/O | High | Pull down |
PB08 | I/O | High | Pull down |
Table 2. Initial Value of GPIO Pins
Circuit
3.1. System
The WizFi360 has a very simple circuit. You can connect power to the WizFi360
and send and receive data through UART1. And you have to pay attention to the
four pins.
Figure 6. Reference Schematic
-
Reset
Reset circuit offers to design with RC circuit. WizFi360 reset automatically by low level power. If RESET pin controlled by external circuit, the WizFi360 will reset when the level is below 2.0V.
The low level needs to last more than 100µs. -
PA0
PA0 circuit offers to design 10k pull-up. PA0 is used as a boot pin, but it’s use unlikely for normal users. This pin is used at the factory stage. (Module production) -
PA1
PA1 circuit offers to design 10k pull-up. If PA1 is Low for 3 seconds, UART1’s current parameter changes to default value (please refer to the AT+UART_CUR command in WizFi360 AT command manual). -
WP
WP circuit offers to design user configuration. You must control this pin if you are using standby mode. If this pin is high in Standby mode, the WizFi360 is reset to the normal operating mode.
3.2. Power
WizFi360 requires the use of a power supply capable of supplying 3.0V to 3.6V
and more than 500mA. Because WizFi360 operates normally from 3.0V to 3.6V, it
consumes up to 230mA of instantaneous current. The wiring width should not be
less than 30mil.
The power stabilizing capacitor (100nF) should be placed close to the VCC pin.
3.3. UART
Figure 7. UART
-
UART1
UART1 is the main communication UART. AT command communication is possible with UART1 and data communication is possible. -
UART0
UART0 is not available to normal users. This UART is used at the factory stage (Module production) and intended for internal firmware developers of the WizFi360.
3.4. SPI
The WizFi360 supports SPI communication mode. When the power is turned on or
reset, If the PB13(SPI_EN) pin remains low, it operates in SPI communication
mode.
Figure 8. SPI Interface
3.5. ETC
This session is an additional circuit guide for using the WizFi360. You don’t
have to keep this session. But if you need it, you design it.
-
UART Flow Control
If you want to use UART Flow Control, you need to design a circuit as shown in Figure 3. PB9 is CTS1, PB10 is RTS1. Figure 9. UART Flow Control -
UART Level Shifter
The UART voltage on the WizFi360 is 3.3V. However, your MCU may not have a voltage of 3.3V. If so you need a Level Shifter to connect the WizFi360 to your MCU. You can design a Level Shifter circuit by referring to Figure 4. Connect your MCU’s UART voltage to the VCCIO at Figure 4.
Figure 10. UART Level Shifter
PCB Footprint
Figure 11. Recommended PCB Land Pattern of WizFi360
PCB layout
- Power wiring width should not be less than 30mil.
- Except for the antenna portion of WizFi360, the bottom layer of the shield can must have a GND plane. Figure 12. GND
- Figures. 6 and Figures. 7 are 2 antenna placement which can best performance of antenna. We suggest customers to choose one of these 2 modes to design the placement. For the second placement mode, PCB antenna should be at least 5.0mm from both sides of the bottom board.
Copyright Notice
Copyright 2022 WIZnet Co., Ltd. All Rights Reserved.
Technical Support: https://forum.wiznet.io/
Sales & Distribution: sales@wiznet.io
For more information, visit our website at http://www.wiznet.io/
WizFi360 Hardware Design Guide
References
- WIZnet : Internet Offload Processor Provider
- WIZnet : Internet Offload Processor Provider
- WIZnet Developer Forum
Read User Manual Online (PDF format)
Read User Manual Online (PDF format) >>