QUECTEL LG69T Multi Band GNSS Module User Guide
- June 14, 2024
- QUECTEL
Table of Contents
QUECTEL LG69T Multi Band GNSS Module
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About the Document
- Document Information
- Title LG69T (AB) Firmware Upgrade Guide
- Subtitle GNSS Module Series
- Document Type Firmware Upgrade Guide
- Document Status Released
Revision History
Version | Date | Description |
---|---|---|
– | 2022-11-10 | Creation of the document |
1.0 | 2023-05-04 | First official release |
**** 1.1 | **** 2023-09-11 |
- Updated the firmware upgrade process. ( _ _Chapters__ 2.2.2 to 2.2.5)
- Updated the timeout for the module’s response to perform CRC check. (Chapter 2.2.6)
Introduction
This document explains the procedure to upgrade the firmware of the Quectel
LG69T (AB) GNSS module.
Once the module is connected to the host via the UART interface, the firmware
upgrade process can start.
Firmware Upgrade Connection
NOTE
If the firmware upgrade fails or the process is stopped by the user, no
backup firmware can be executed. The only way to reprogram a non-working
firmware is to reset the hardware into Boot download mode and start a new
upgrade process.
Firmware Upgrade Process
Firmware Upgrade in Boot Download Mode
Upgrading in Boot download mode can be a relatively simple process from the
host side. In case of a failure or error during the firmware upgrade, it is
only necessary to re-initiate the upgrade process. For details about how to
enter the Boot download mode, see document [1] hardware design.
Firmware Upgrade in Boot Download Mode
Process
- This chapter explains all the necessary steps in the firmware upgrade process.
- The following table defines all constants used in this document.
Table 1: List of Constants
Constant Name | Constant |
---|---|
FLASHER_IDENTIFIER | 0x2849C6FD |
FLASHER_SYNC | 0xA62C543A |
CHANGE_BAUD_RATE | 0x71 |
CHECK_BAUD_RATE | 0x0001C200 |
BAUD_RATE_CHANGED | 0x38 |
HOST_READY | 0x5A |
PREPARE_PREAMBLE | 0x0000000000FF010483984073BCD501F4 |
BOOTLOADER_START_COMMUNICATION | 0xDD26D303 |
BINARY_SIZE | 0x00002AA0 |
FLASH_CHUNKSIZE | 0x00000000 |
FLASH_READY | 0x4A |
ACK | 0xCC |
NAK | 0xE6 |
NOTE
All the constant values are transmitted in little-endian format. For example,
the constant value for FLASHER_IDENTIFIER is 0x2849C6FD, which the host
transmits as FD C6 49 28.
Synchronize Module
This step synchronizes between the host and the module. Host continuously
sends the FLASHER_IDENTIFIER to the module at 100 ms intervals. If the module
receives FLASHER_IDENTIFIER within 1000 ms from powering up, the module will
respond with FLASHER_SYNC. For the constant parameters in the figure below,
see Table 1: List of Constants.
Synchronization
Change Baud Rate
This section describes how the host notifies the module to change the baud
rate. Firstly, the host sends CHANGE_BAUD_RATE and CHECK_BAUD_RATE to the
module, and the module responds with two ACKs. Then, the module and the host
are automatically changed to a baud rate of 115200 bps. After that, the host
sends BAUD_RATE_CHANGED to the module and receives an ACK from the module to
confirm the baud rate change. For the constant parameters in the figure below,
see Table 1: List of Constants.
Change Baud Rate
NOTE
If the module does not respond to CHECK_BAUD_RATE or BAUD_RATE_CHANGED
within 3500 ms, baud rate change will fail.
Send Bootloader
The following diagram illustrates how to send bootloader (ql_t5_flasher.bin
file) data to the module. For the constant parameters in the figure below, see
Table 1: List of Constants.
Send Bootloader
NOTE
The module has a 3500 ms timeout for responding to HOST_READY, and a 1000
ms timeout for responding to bootloader data. If timeout is exceeded, the
process will fail.
Erase Flash
The following diagram illustrates the module flash erasing process. In this
case, the module will take some time to complete the erasing, during which all
flash areas will be cleared. The host must wait for an ACK response from the
module as the confirmation that the flash program area has been erased. For
the constant parameters in the figure below, see Table 1: List of Constants.
Erase Flash
The host sends the binary image options to erase flash area:
- //Binary image options
- struct OperatingModeOptions {
- signed int code_size;
- unsigned int bootMode;
- unsigned int crc32;
- signed int dest_addr;
- signed int entry_offset;
- unsigned char erase_option;
- unsigned char erase_only;
- unsigned char program_only;
- unsigned char sub_sector;
- unsigned char sta8090fg;
- unsigned char reserved1;
- unsigned char reserved2;
- unsigned char reserved3;
- signed int erase_offset;
- signed int erase_size;
- unsigned int debug_enable;
- unsigned int debug_mode;
- unsigned int debug_addr;
- signed int debug_size;
- unsigned int debug_data; } ;};
Parameter
NOTE The timeout for erasing the Flash area is 60000 ms, and the timeout for other ACK responses is 3500 ms. If timeout is exceeded, the process will fail.
Send Firmware Package
In this phase, the host will send the firmware package to the module for
upgrading the module’s flash. The software running on the host splits the
firmware package (binary image data) into several chunks of 5 KB. The last
chunk will be the size of any remaining bytes. The module will acknowledge
receipt of each data chunk with an ACK response. For the constant parameters
in the figure below, see Table 1: List of Constants.
Send Firmware Data
NOTE
If the module does not respond with ACK within 3500 ms, the sending will
fail.
Perform CRC Check
In this phase, the module’s bootloader performs a CRC check on the firmware
package sent by the host. For details of CRC checksum, see Chapter 4 Appendix
A CRC32 Sample Code. If the check is passed, an ACK response will be sent to
the host within 60000 ms and the downloaded new firmware will be considered
validated. If the check fails, an NAK response will be returned.
CRC Check
NOTE
If the module does not respond with ACK within 60000 ms, CRC check will
fail.
Firmware Upgrade Example
This chapter provides the example of firmware upgrade procedure.
-
//Host continuously sends FLASHER_IDENTIFIER
-
FD C6 49 28
-
FD C6 49 28 …
-
FD C6 49 28
-
FD C6 49 28
//Module responds with FLASHER_SYNC. -
3A 54 2C A6
//Host sends CHANGE_BAUD_RATE. -
71
//Host sends CHECK_BAUD_RATE. -
00 C2 01 00
//Module responds with ACK. -
CC
//Module responds with ACK. -
CC
//Host sends BAUD_RATE_CHANGED. -
38
//Module responds with ACK. -
CC
//Host sends HOST_READY. -
5A
//Module responds with ACK. -
CC
//Host sends PREPARE_PREAMBLE. -
F4 01 D5 BC 73 40 98 83 04 01 FF 00 00 00 00 00
//Host sends BOOTLOADER_START_COMMUNICATION. -
03 D3 26 DD
//Host sends BINARY_SIZE. -
A0 2A 00 00
//Host sends FLASH_CHUNKSIZE. -
00 00 00 00
//Host sends first bootloader data. -
02 F0 4E B8…
//Host sends second bootloader data. -
65 FF DC F8…
//Host sends third bootloader data. -
1D 49 AB B5…
//Module responds with ACK. -
CC
//Host sends FLASH_READY. -
4A
//Module responds with ACK. -
CC
//Host sends Binary image options. -
F8 17 0D 00 01 00 00 00 A8 3F ED A3 00 00 00 10 00 04 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
//Module responds with ACK. -
CC
- //Wait for device initialization.
- //Module responds with ACK.
-
CC
//Erase complete. -
CC
//Host sends first firmware package. -
53 42 4C 00 01 06…
//Module responds to first firmware package with ACK. -
CC
//Host sends second firmware package. -
00 00 00 00 41 02…
//Module responds to second firmware package with ACK. -
CC …
//Host sends last firmware package. -
00 00 00 00 00 00…
//Module responds to the last firmware package with ACK. -
CC
//Module responds with ACK if CRC check has been passed. -
CC
//Module restarts automatically.
Appendix A CRC32 Sample Code
-
CRC32 algorithm. constuint 32_t crc32_tab[ ] = {
-
0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a,
0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c,0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d -
}; uint32_t Ql_Check_CRC32(uint32_t Val, const unsigned char *Data, int32_t Offset, int32_t Length)
-
{ uint32_t result = Val ^ 0xFFFFFFFF; uint32_t i = 0;
-
for (i = Offset; i < (Offset + Length); i++)
-
{ result = crc32_tab[(result ^ Data[i]) & 0xFF] ^ (result >> 8);
-
} return (result ^ 0xFFFFFFFF); }
Appendix B References
Table 2: Related Document
-
Document Name
- [1] Quectel_LG69T(AB)_Hardware_Design
Terms and Abbreviations
Documents / Resources
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