engrcs PICmicro User Guide

engrcs PICmicro

Pin Layout

The two pins whose definition is constant are pins 5 and 14, which are ground and power.

• Pin 5 Ground (0 V)
• Pin 14 Power (2 to 5.5 V)

**Program Memory Layout

**

Data Memory Layout “General Purpose Registers (GPR)” 

Direct Addressing

PICmicro Instruction Set Summary 1/3

Note

1. When a Port register is modified as a function of itself (e.g., MOVF PORTB, 1, o), the value used will be that value present on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and is
   driven low by an external device, the data wll be written back with a ‘o’.

2. If this instruction is executed on the TMRO register (and where applicable, d = 1), the prescaler will be cleared if assigned.

3. If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP.

4. Some instructions are 2-word instructions. The second word of these instructions will be executed as a Nop, unless the first word of the instruction retrieves the information embedded in these 16 bits. This ensures that all program memory locations have a valid instruction.

5. If the table write starts the write cycle to internal memory, the write will continue until terminated.

PICmicro Instruction Set Summary 2/3

Note

1. When a Port register is modified as a function of itself (e.g., MOVF PORTB, 1, 0), the value used will be that value present on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and is driven low by an external device, the data will be written back with a ‘o’.

2. If this instruction is executed on the TMRO register (and where applicable, d =1), the prescaler will be cleared if assigned.

3. If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP
   Some instructions are 2-word instructions. The second word of these instructions will be executed as a NOP, unless the first word of the instruction retrieves the information embedded in these 16 bits. This ensures that all program memory locations have a valid instruction.

4. If the table write starts the write cycle to internal memory, the write will continue until terminated.

PICmicro Instruction Set Summary 3/3

Note

1. When a Port register is modified as a function of itself (e.g., MOVF PORTB, 1, 0), the value used will be that value present on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and is driven low by an external device, the data will be written back with a ‘o.
2. If this instruction is executed on the TMRO register (and where applicable, d = 1), the prescaler will be cleared if assigned.
3. If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as aNOP.
4. Some instructions are 2-word instructions. The second word of these instructions will be executed as a NOP unless the first word of the instruction retrieves the information embedded in these 16 bits. This ensures that all program memory locations have valid instructions.
5. If the table write starts the write cycle to internal memory, the write will continue until terminated.

Special Function Register (SFR) Map 1/3

Special Function Register Map 2/3 

Special Function Register Map 3/3

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