ANALOG DEVICES EVAL-ADRF5714 Silicon Digital Attenuator User Manual
- June 16, 2024
- Analog Devices
Table of Contents
User Guide | EVAL-ADRF5714
UG-2173
Evaluation of the ADRF5714 Silicon Digital Attenuator, 1-Bit, 100 MHz to 30
GHz
ADRF5714-EVALZ EVALUATION BOARD PHOTOGRAPH
FEATURES
- Full featured evaluation board for the ADRF5714
- Easy connection to test equipment
- Additional through line for calibration
EQUIPMENT NEEDED
- DC power supplies
- Network analyzer
GENERAL DESCRIPTION
The ADRF5714 is a 1-bit digital attenuator with 16 dB attenuation control
range manufactured in the silicon on insulator (SOI) process.
This user guide describes the ADRF5714-EVALZ, which is designed to simply
evaluate the features and performance of the ADRF5714. A photograph of the
ADRF5714-EVALZ is shown in Figure 1.
The ADRF5714 data sheet provides full specifications for the ADRF5714. Refer
to the ADRF5714 data sheet in conjunction with this user guide when using the
ADRF5714-EVALZ.
REVISION HISTORY
12/2023—Revision 0: Initial Version
EVALUATION BOARD HARDWARE
OVERVIEW
The ADRF5714-EVALZ is a connectorized board, assembled with the ADRF5714 and
its application circuitry. All components are placed on the primary side of
the ADRF5714-EVALZ. An assembly drawing for the ADRF5714-EVALZ is shown in
Figure 8, and an
evaluation board schematic is shown in Figure 7.
BOARD LAYOUT
The ADRF5714-EVALZ is designed using RF circuit design techniques on a 4-layer
printed circuit board (PCB). The PCB stack-up is shown in Figure 2.
The outer copper layers are 1.5 oz (2.2 mil) thick and the inner layers are
0.5 oz (0.7 mil) thick.
The top dielectric material is 12 mil Rogers 4003, which provides 50 Ω
controlled impedance and optimizes the high frequency performance. All RF
traces are routed on the top layer, and the second layer is used as the ground
plane for RF transmission lines. The remaining two layers are also ground
planes filled with FR4 material to manage the thermal rise during high power
operations and are supported with dense and filled vias to the PCB bottom for
thermal relief. The overall board thickness is approximately 62 mil for
mechanical strength.
The RF transmission lines are designed using a coplanar waveguide (CPWG) model
with a width of 16 mil and ground spacing of 6 mil to have a characteristic
impedance of 50 Ω. Ground via fences are arranged on both sides of the CPWG to
improve isolation between nearby RF lines and other signal lines.
The exposed ground pad of the ADRF5714, which is soldered on the PCB ground
pad, is the main thermal conduit for heat dissipation. The PCB ground pad is
densely populated with filled, through vias to provide the lowest possible
thermal resistance path from the top to the bottom of the PCB. The connections
from the package ground leads to ground are kept as short as possible.
POWER SUPPLY AND CONTROL INPUTS
The ADRF5714-EVALZ has two power supply inputs, one control input, and a
ground, as shown in Table 1. The DC test points are populated on VDD, VSS, D0,
and GND. A 3.3 V supply is connected to the DC test points on VDD, and the
−3.3 V supply is connected to the DC test points on VSS. Ground reference can
be connected to GND. Connect the D0 control input to 3.3 V or 0 V.
The typical total current consumption for the ADRF5714 is between 630 mA and
660 mA.
The VDD and VSS supply pins of the ADRF5714 are decoupled with a 100 pF
capacitor.
Table 1. Power Supply and Control Inputs
Test Point | Description |
---|---|
VDD | +3.3 V supply voltage |
VSS | −3.3 V supply voltage |
D0 | Control Input 1 |
GND | Ground |
RF INPUTS AND OUTPUTS
The ADRF5714-EVALZ has four edge-mounted, 2.92 mm connectors for the RF inputs
and outputs, as shown in Table 2.
Table 2. RF Inputs and Outputs
SMA Connector | Description |
---|---|
ATTIN | Attenuator input |
ATTOUT | Attenuator output |
THRU1 | Thru line input and output |
THRU2 | Thru line input and output |
The ADRF5714-EVALZ is shipped together with a through line that calibrates out the board loss effects from the measurements determining the device performance at the pins of the IC.
TEST PROCEDURE
BIASING SEQUENCE
To bias up the ADRF5714-EVALZ, take the following steps:
- Ground the GND test point.
- Bias up the VDD test point.
- Bias up the VSS test point.
- Bias up the D0 test point.
- Apply an RF input signal.
The ADRF5714-EVALZ is shipped fully assembled and tested. Figure 3 provides a basic test setup diagram to evaluate the s-parameters using a network analyzer. Perform the following steps to complete the test setup and to verify the operation of the ADRF5714-EVALZ:
- Connect the GND test point to the ground terminal of the power supply.
- Connect the VDD test point to the voltage output terminal of the 3.3 V supply.
- Connect the VSS test point to the voltage output terminal of the −3.3 V supply. Note that the current from the VDD test point is around 130 μA and the current from the VSS test point isaround 500 μA.
- Connect the D0 test point to the voltage output terminal of the 3.3 V supply. The ADRF5714 can be configured in different modes by connecting the control test points to 3.3 V or 0 V, as shown in Table 3.
- Connect a calibrated network analyzer to the ATTIN and ATTOUT 2.92 mm connectors. Sweep the frequency from 100 MHz to 30 GHz and set the power to 10 dBm.
- The ADRF5714-EVALZ is expected to have an insertion loss of 1.30 dB at 30 GHz. See the expected results in Figure 4.
Additional test equipment is needed to fully evaluate the device functions and
performance. For third-order intercept point evaluation, use two signal
generators and a spectrum analyzer. A high isolation power combiner is also
recommended.
For power compression and power handling evaluations, use a 2channel power
meter and a signal generator. A high enough power amplifier is also
recommended at the input. Test accessories, such as couplers and attenuators,
must have enough power handling.
Note that the measurements performed at the 2.92 mm connectors of the
ADRF5714-EVALZ include the losses of the 2.92 mm connectors and the PCB. The
thru line must be measured to calibrate out the effects on the ADRF5714-EVALZ.
The thru line is the summation of an RF input line and an RF output line that
are connected to the device and equal in length.
Table 3. Control Voltage Truth Table
D0 | Attenuation State (dB) |
---|---|
Low | 0 (reference) |
High | 16 |
EXPECTED RESULTS
EVALUATION BOARD SCHEMATIC AND ARTWORK
ORDERING INFORMATION
BILL OF MATERIALS
Table 4. Bill of Materials for ADRF5714-EVALZ
Quantity | Reference Designator | Description | Manufacturer | Part Number |
---|---|---|---|---|
2 | C1, C2 | Capacitors, 100 pF, 50 V, C0402 package | Murata | GCM1555C1H101JA16D |
1 | R1 | Resistor, 0 Ω, 1/10 W, R0402 package | Yageo | RC0402JR-070RL |
2 | ATTIN, ATTOUT | Surface-mount test points | Hirose Electronic Co. | HK-LR- |
SR2(12)
4| D0, GND, VDD, VSS| Surface-mount test points| Components Corporation|
TP-104-01-0X
1| U1| 1-bit digital attenuator| Analog Devices, Inc.| ADRF5714
1| PCB| Evaluation board| Analog Devices| ADRF5714-EVALZ
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit
boards can discharge without detection. Although this product features
patented or proprietary protection circuitry, damage may occur on devices
subjected to high energy ESD. Therefore, proper ESD precautions should be
taken to avoid performance degradation or loss of functionality.
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Rev. 0
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