DIODES EV34 USB PD 3.0 + PPS Compact Adaptor User Guide

45W USB PD 3.0 + PPS Compact Adaptor
EV3 Board User’s Guide

Chapter 1. Summary

1.1 General Description
The 45W USB PD 3.0 Adaptor Evaluation Board EV3 is composed of three main parts, AP3108LS PWM controller offers with high voltage soft startup circuit, a high voltage LDO makes the Vcc working range more wider, with a X-cap discharge function and a frequency fold back functional for improving Eff. The APR348 is a Synchronous Rectification Controller, as well as AP43771 is a USB PD3.0 protocol decoder that is based on monitoring CC1 & CC2 signals and interprets the desired voltage and current requested from secondary side, and then feeds back the information to primary side AP3108LS controller for getting well regulated voltage and current as well as related protection functions.

1.2 Key Features
1.2.1 System Key Features

• SSR Topology Implementation with an Opto-coupler for Accurate Step Voltage Controlling
• USB PD 3.0 Compliance
• Meet DOE 6 and CoC Tier 2 Efficiency Requirements
• <30mW No-Load Standby Power

1.2.2 AP3108LS Key Features

• Current Mode PWM Controller
• Frequency Shift function changes frequency per line loading
• Frequency fold back for high average efficiency
• Integration of High-Voltage Start-Up Circuit to enable low standby power
• Integration of 120V LDO, X-Cap discharge for minimal system BOM components
• Constant load output current during output short circuit
• Rich Protection Functions: , Precise Secondary Side OVP, UVP, OLP, BNO, FOCP, SSCP, External Programmable OTP

1.2.3 APR348 Key Features

• Synchronous Rectification operating at DCM, CCM and QR mode for Flyback topology
• Eliminate Resonant Ringing Interference
• Only Two External Components Used

1.2.4 AP43771 Key Features

• Supports USB PD3.0 PPS Type-C and QC4/QC4+
• Drives N-Channel MOSFET for Load Switch
• Built-in VBUS Discharger Pin
• 3V-20V operation voltage without external regulator
• On-chip OVP,UVP,OCP and SCP
• Supports OTP through integrated ADC circuit
• USB PD3.0 PPS Compliance ( TID : 1100023)

1.3 Applications

• USB PD 3.0 Wall Adaptor
• USB PD 3.0 Car Charger
• Power Bank

1.4 Main Power Specifications (CV & CC Mode)

PPS1: 3.3V~11V@4A
PPS2: 3.3V~16V@3A
Efficiency| >90%
Total Output Power| 45W
Protections| OVP, UVP, OLP, BNO, FOCP, SSCP, OTP
XYZ Dimension| 54 x 37.6 x 25mm
ROHS Compliance| Yes

1.5 Evaluation Board Picture

Chapter 2. Power Supply Specification

2.1 Specification and Test Results

89.02% @230VAC/50Hz
Tier2 Eff>83.68%
5V/0.4A Efficiency (10% Load)| Tier2 Eff>74.24%| PASS, 86.92% @115VAC/60Hz, 85.45% @230VAC/50Hz
9V/4A average Efficiency| DoE VI Eff >87.40%| PASS, 90.51% @115VAC/60Hz, 90.92% @ 230VAC/50Hz
Tier2 Eff>88.30%
9V/0.4A Efficiency (10% Load)| Tier2 Eff>78.30%| PASS, 88.76% @115VAC/60Hz, 86.44% @230VAC /50Hz
15V/3A Average Efficiency| DoE VI Eff >87.73%| PASS, 91.15% @115VAC/60Hz, 91.81% @ 230VAC/50Hz
Tier2 Eff>88.85%
15V/0.3A Efficiency (10% Load)| Tier2 Eff>78.85%| PASS, 85.76% @115VAC/60Hz, 83.70% @230VAC /50Hz
20V/2.25A Average Efficiency| DoE VI Eff >87.73%| PASS, 90.89% @115VAC/60Hz, 91.73% @ 230VAC/50Hz
Tier2 Eff>88.85%
20V/0.225A Efficiency (10% Load)| Tier2 Eff>78.85%| PASS, 81.88% @115VAC/60Hz, 80.29% @230VAC /50Hz
EMI Conduction & Radiation| >6dB Margin; according to FCC / EN55022 Class B| Pass, CE Margin >6dB Pass, RE Margin >6dB

2.2 Compliance

Parameter| Test conditions| Low to High| High to Low| standard| Test Summary
---|---|---|---|---|---
Output Voltage Transition time| 5V/3A to 9V/3A| 57ms| 64ms| 275mS <| Pass
Output Voltage Transition time| 9V/3A to 15V3A| 82ms| 85ms| 275ms <| Pass
Output Voltage Transition time| 15V/2.25A to 20V/2.25A| 70ms| 66ms| 275mS <| Pass
Output Voltage Transition time| 5V/0A to 20V/0A (Worst Case)| 193ms| 199ms| 275mS <| Pass
Output Connector| USB Type C| –| –| –|
Temperature| 20V / 2.25A @90Vac and 264Vac| | –| –| <90℃
Dimensions (W /D/ H)| L54mm x 37.6mm x 25mm| –| –| –|
Safety| IEC/EN/UL 60950 Standard| –| –| –|
EMI Conduction & Radiation| FCC/EN55022 Class B| –| –| –| Margin>6db

Chapter 3. Schematic

3.1 EV3 Board Schematic

Figure 3: Evaluation Board Schematic

3.2 Bill of Material (BOM)

3.1 Transformer Design Specification

RM9 （ Ae=75mm2 ）|
---|---
NO| NAME| TERMINAL NO.| WINDING
START| FINISH| WIRE| TURNS| Layers
1| Np1| 1| 5| Φ 0.14mm*8P  2UEW| 23.5 TS| 2

2

| Na| 4| 3（GND）| Φ 0.14mm*1P  2UEW| 15 TS| ****

1

Shield1| 3| NC| Φ 0.14mm2P  2UEW| 15 TS
3| Ns| A| B| Φ 0.23 mm 15P TIW-B| 5 TS| 1
4| Shield2| 3| NC| Φ 0.15mm1P  2UEW| 26 TS| 1
5| Np2| 6| 2| Φ 0.14mm8P  2UEW| 11.5 TS| 1
Primary Inductance| Pin 1-2,all other windings open, measured at 20kHz, 0.4VRMS| 360µH±5%
---|---|---
Primary Leakage Inductance| Pin 1-2, all other windings shorted, measured at 20kHz, 0.4VRMS| 20µH (Max.)
Notes| 1, Core connect to Pin3 2, Core Material：PC95
3, Pin5 & Pin6 connected on PCB Board
4, Two layers of tape wrapped on each of winding.

Figure 4: RM9 Bobbin

3.4 Schematics Description
3.4.1 AC Input Circuit & Differential Filter
There are four components in this section. The Fuse F1 protects against over- current conditions which occur when some of the main components fail. The NTC1 can effectively reduce inrush current. The LF1 is common choke filter for the common mode noise suppression filtering due to each coil with large impedance. The BD1 is an AC-DC rectifier, and converts alternating current & voltage into direct current & voltage.

3.4.2 AP3108LS PWM Controller
The AP3108LS PWM controller U1 and Opto-Coupler U2 as well as Q1 are the power converting core components. Connected to filtered output after bridge circuit, D9 & R6 resistor path will provide start-up voltage and current during starting up through HV (Pin 9). Subsequent VCC power will be provided by voltage feedback from the auxiliary winding through R60 and D6. This design is to accommodate the required wide voltage range to support various protocols (including USB PD Programmable Power Supply PPS), from 3.3V to 20V.
Based on feedback of secondary side (Pin CATH of AP43771 Decoder) to primary side (FB pin of AP3108LS) by through Optocoupler U2, the AP3108LS will switch ON and Off Q1 to regulate the desired voltage and current on the secondary side.

3.4.3 APR348 Synchronous Rectification (SR) MOSFET Driver
The APR348 operates in CCM/DCM mode in this design and drives the Q51 MOSFET. As the power loss with the APR348-controlled MOSFET Q51 is less than Schottky Diodes, the total efficiency can be improved.

3.4.4 AP43771 PD3.0+ Decoder & Protection on /off P MOSFET and Interface to Power Devices
The few sets of important pins provide critical protocol decoding and regulation functions in AP43771:

1. CC1 & CC2 (Pin 10, 11): CC1 & CC2 (Configuration Channel 1 & 2) are defined by the USB PD spec to provide the channel communication link between power source and sink devices.
2. Constant Voltage (CV): The CV sensing resistors are integrated into MCU. There is a loop compensation circuit C26 & R26 between Pin8 & Pin5, the fast voltage response can be obtained by adjusting their value. The output voltages can be adjusted by firmware programming.
3. Over current protection (OCP): The OCP is implemented by sensing via current sense resistor (R21, 10mΩ) and current sense amplifier, then comparing with internal programmable reference voltage to generate a signal on OCDRV pin (pin 5).
4. OCDRV (Pin 5): It is the key interface that links secondary decoder (AP43771) to primary PWM regulation controller (AP3108LS), through the Cath pin to Opto-coupler U2A link that will feed all information based on all sensed CC1 & CC2 voltage status signals back to primary PWM controller for getting desired Vbus voltage & current.
5. GATE Driver (Pin 2) to N-MOSFET Gate: The pin is used to turn on/off Vbus load switch (Q3) to enable/disable voltage output to the Vbus. An extra N-MOSFET (Q3) is required to prevent reverse current from the attached battery source.

Chapter 4. The Evaluation Board (EVB) Connections

4.1 EVB PCB Layout
The thickness for both sides of PCB board trace copper is 2 oz.

Figure 5: PCB Board Layout Top View Figure 6: PCB Board Layout Bottom View

4.2 Quick Start Guide before Connection

1. Before starting the 45W EVB test, the end user needs to prepare the following tool, software and manuals.
   For details, please consult USBCEE sales through below link for further information.
   USBCEE PD3.0 Test Kit: USBCEE Power Adapter Tester. https://www.usbcee.com /product-details/4 Figure 6: Items: Test Kit / Test Cables

2. Prepare a certified three-foot Type-C cable and a Standard-A to Micro-B Cable.

3. Connect the input AC L & N wires to AC power supply output “L and N“ wires.

4. Ensure that the AC source is switched OFF or disconnected before the connection steps.

5. A Type-C cable for the connection between EVB’s and Cypress’s Type-C receptacles.

6. Use 2 banana jack cables, one port of the cables are connected to E-load + & – terminals while the other port of the cables are connected to EVB’s VBUS & GND pads.

7. A Standard-A to Micro-B cable to be connected to the Cypress test kit’s Micro-B receptacle & PC Standard-A receptacle respectively.

4.3 System Setup
4.3.1 Connection with E-Load

Figure 7: Diagram of Connections in the Sample Board

4.3.2 USBCEE PAT Tester

Figure 8: The Test Kit Input & Output and E-load Connections

4.3.3 Input & Output Wires Connection

Figure 9: Wire Connection of 45W PD3.0 EVB to Test Kit and PC Computer

Chapter 5. Testing the Evaluation Board

5.1 Input & Output Characteristics
5.1.1 Input Standby Power

Note: Standard Power test condition: The output terminal of power board don’t connected any load
5.1.2 Input Power Efficiency at Different AC Line Input Voltage and its chart curve

5.1.3 Average Efficiency at Different Loading (@ PCB end) and its chart curve

Vin| Vo| 10% Load| 25% Load| 50% Load| 75% Load| 100% Load| Average Efficiency| Energy Star Level VI| COC_Tier2
---|---|---|---|---|---|---|---|---|---
115V/60Hz| 5V-4A| 86.92%| 90.28%| 89.87%| 89.23%| 88.57%| 89.49%|

83.08%| >83.68%
9V-4A| 88.76%| 91.13%| 90.75%| 90.30%| 89.69%| 90.51%| >87.40%| >88.30%
15V-3A| 85.76%| 91.03%| 91.56%| 91.27%| 90.75%| 91.15%| >87.73%| >88.85%
20V-2.25A| 81.88%| 90.15%| 91.22%| 91.11%| 91.07%| 90.89%| >87.73%| 88.85%
230V/50HZ| 5V-4A| 85.45%| 88.25%| 89.64%| 89.28%| 88.92%| 89.02%| 83.08%| >83.68%
9V-4A| 86.44%| 90.75%| 91.35%| 90.88%| 90.70%| 90.92%| >87.40%| >88.30%
15V-3A| 83.70%| 90.61%| 92.35%| 92.20%| 92.10%| 91.81%| >87.73%| >88.85%
20V-2.25A| 80.29%| 90.08%| 92.12%| 92.24%| 92.47%| 91.73%| >87.73%| 88.85%

5.2 Key Performance Waveforms
5.2.1 45W PD3.0 System Start-up Time

5.2.2 Q1 /Q2 Main Switching Voltage MOSFET Stress on at 20V/ 2.25A Loading @264Vac

Figure 11: Q1 Vds Voltage stress Figure12: Q2 Vds Voltage stress

Vout| Vds| Vds_Max_Spec| Ratio of voltage stress| | Vout| Vds| Vds_Max_Spec| Ration of voltage stress
---|---|---|---|---|---|---|---|---
20V| 620V| 650V| 95%| | 20V| 73.9V| 100V| 74%

5.2.3 System Output Ripple & Noise with @ PCB End

5.2.4 Dynamic load —-10% Load – 90% Load, Tr=10mS , 100mA/uS( PCB End)

| Vo_Undershoot(V)| Vo_Overshoot(V)
---|---|---
Vin=90VAC| 8.63| 9.24
Vin=264VAC| 8.63| 9.25

5.2.5 Output Voltage Transition Time
5.2.5.1 From Step up & Step down

5.2.5.2 Transition time from Low to high

5.2.5.3 Output Voltage Transition Time from High to Low

5.2.7 Thermal Testing
5.2.7.1 Test Condition: AC input=90Vac, Load 20V-2.25A ,Open Frame

5.2.7.2 Test Condition: Vin=264Vac Vo=20V Io=2.25A Open Frame

5.3. EMI testing results
5.3.1 EMI (CE) Testing results—115Vac @ 20V/2.25A- (L) & (N)

5.3.2 EMI (CE) Testing results—230Vac @ 20V/2.25A- (L) & (N)

5.3.3 EMI (RE) Testing results—115Vac @ 20V/2.25A

5.3.4 EMI (RE) Testing results—230Vac @ 20V/2.25A

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45W USB PD 3.0 PPS Adaptor EV3
Rev 1.0
11-12-2019
www.diodes.com

References

• USBCEE

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