ANALOG DEVICES LTC3304A, 3.3 V to 1.2 V at 6 A, 2 MHz Synchronous Step Down Regulator User Guide
- June 16, 2024
- Analog Devices
Table of Contents
ANALOG DEVICES LTC3304A, 3.3 V to 1.2 V at 6 A, 2 MHz Synchronous Step Down Regulator User Guide
FEATURES
► LTC3304A evaluation board
► Transient circuit included for load-transient evaluation
► EMI filter included to reduce noise in EMI emission tests
EVALUATION KIT CONTENTS
► DC3203A evaluation board
DOCUMENTS NEEDED
► LTC3304A data sheet
EQUIPMENT NEEDED
► One 5 V, 6 A, DC power supply
► One 6 A, Electronic load
► Three digital voltmeters
► Two digital ammeters
GENERAL DESCRIPTION
Demonstration Circuit DC3203A features the LTC3304A, 5 V, 6 A synchronous step-down silent switcher operating as a 2 MHz, 3.3 V to 1.2 V, 6 A buck regulator. The LTC3304A supports adjustable output voltages from 0.5 V to VIN. The LTC3304A is a compact, high efficiency, and high-speed synchronous monolithic step-down switching regulator. A minimum on-time of 27 ns enables high VIN to low VOUT conversion.
The DC3203A operating mode can be selected as Burst Mode operation, skip (PS), or forced continuous (FC) mode. Setting JP1 to the SKIP position allows the LTC3304A to sync to a clock frequency from 1.6 MHz to 2.4 MHz. The LTC3304A operates in forced continuous mode when syncing to an external clock.
The DC3203A also has an EMI filter to reduce conducted EMI. This EMI filter can be included by applying the input voltage at the VIN EMI terminal. The EMI performance of the board is shown in the EMI Test Results section. The red lines in the EMI performance graphs show the CISPR25 Class 5 peak limits for the conducted and radiated emission tests.
The LTC3304A data sheet gives a complete description of the device, operation, and application information. Full specifications on the LTC3304A are available in the LTC3304A data sheet available from Analog Devices, Inc., and must be consulted with this user guide when using the DC3203A evaluation board. The LTC3304A is assembled in a 2 mm × 2 mm FCQFN package with side wettable flanks (SWF) for visual solder inspection. The layout recommendations for low EMI operation and maximum thermal performance are available in the data sheet section Low EMI PCB Layout.
Figure 7 shows the efficiency and the power loss of the circuit with a 3.3 V input in Burst Mode operation.
DC3203A EVALUATION BOARD PHOTOGRAPH
Figure 1. DC3203A Evaluation Board Photograph
PERFORMANCE SUMMARY
Specifications are at TA = 25°C, unless otherwise noted.
Table 1. Performance Summary
1 With 1% resistors. Accuracy improves to within 1% using 0.1% FB resistors or a fixed voltage version of the LTC3304A.
QUICK START PROCEDURE
Demonstration circuit DC3203A is easy to set up and use to evaluate the performance of the LTC3304A. For the proper measurement equipment setup, see Figure 3 and follow the procedure below:
NOTE: For accurate VIN, VOUT, and efficiency measurements, measure VIN at the VIN SNSE and GND SNSE turrets, and VOUT at the VOUT SNSE and GND SNSE turrets as shown as VM1 and VM2 in Figure 3. When measuring the input or output voltage ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. Measure the output voltage ripple by touching the probe tip directly across the output turrets or to TP1 as shown in Figure 4. TP1 is designed for a 50 Ω coax cable to reduce any high frequency noise that might couple into the oscilloscope probes.
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Set the JP1 Jumper to the SKIP position and JP2 to the HI position.
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With power off, connect the input power supply to VIN and GND.
If the input EMI filter is required, connect the input power supply to VIN EMI. -
Slowly increase PS1 to 1.0 V. If AM1 reads less than 20 mA, increase PS1 to 3.3 V. Verify that VM1 reads 3.3 V and VM2 reads 1.2 V.
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Connect an oscilloscope voltage probe as shown in Figure 4 in parallel with VM2. Set Channel to AC-coupled, voltage scale to 20 mV and time base to 10 µs. Observe the VOUT ripple voltage.
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Verify that PGOOD turret is above 1 V.
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Increasing the load by 1 A intervals up to 6 A and record VM1, VM2, AM1, and AM2 for each interval.
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Repeat step 6 for PS1 set to 2.5 V and again for PS1 set to 5.0 V.
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Set the load to a constant 3 A. Remove the oscilloscope voltage probe from VOUT. Place a ground clip on PGND terminal and set the voltage scale to 1 V and the time scale to 500 ns/ Division. Trigger on the rising edge of the voltage probe. Using a tip on the voltage probe, contact the SW node on the pad of L1. Observe the duty cycle and the period of the switching waveform (~500 ns).
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Set the load current to 0.5 A and repeat step 8. Observe that the switching waveform is now operating in pulse skip mode.
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Move the jumper on JP2 to LO. Verify that VOUT reads 0 V and verify that PGOOD is low. Return jumper on JP2 to HI and verify that VM2 is 1.2 V and verify that PGOOD is above 1 V.
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If forced continuous or Burst Mode is required, set PS1 to 0 V. Move JP1 to FC or BURST. Repeat steps 3 through 9. In step 9, observe that the switching waveform is now operating in forced continuous or Burst Mode.
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To test the transient response with a base load, add the required resistor to produce a minimum load between VOUT and RSNS turrets (RL shown on Figure 3). Note that the total load resistance is RL plus R8 (100 mΩ).
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Adjust a signal generator with a 10 ms period, 10% duty cycle, and an amplitude from 1 V to 2 V to start.
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Measure the RSNS voltage to observe the current, VRSNS/100 mΩ. Adjust the amplitude of the pulse to provide the required transient. Adjust the rising and falling edge of the pulse to provide the required ramp rate. For more details, see Figure 9 and the optional transient response circuit shown in Figure 6.
IOUT = VRSNS/100mΩ (1) -
When done, turn off PS1 and Load. Remove all connections to the demo board.
Figure 2. DC3203A Simplified Schematic
Figure 3. Test Setup for the DC3203A Demo Board
Figure 4. Technique for Measuring Output Ripple and Step Response with a Scope Probe
Figure 5. Technique for Measuring Output Ripple and Step Response with a Low Inductance Connector (Not Supplied)
Figure 6. Optional Transient Response Circuit
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 7. Efficiency and Power Loss in Burst Mode Operation
Figure 8. Buck Load Regulation
Figure 9. Load Transient Response Forced Continuous Mode
EMI TEST RESULTS
Figure 10. Conducted EMI Performance (CISPR25 Conducted Emission Test with Class 5 Peak Limits)
Figure 11. Radiated EMI Performance (CISPR25 Radiated Emission Test with Class 5 Peak Limits, Vertical)
Figure 12. Radiated EMI Performance (CISPR25 Radiated Emission Test with Class 5 Peak Limits, Horizontal)
EVALUATION BOARD HARDWARE
INTRODUCTION TO THE DC3203A
Figure 13. VOUT Ripple Without C9 X2Y Capacitor
The DC3203A demonstration circuit features the LTC3304A, a low voltage synchronous step-down regulator. The LTC3304A is a monolithic, constant frequency, current mode step-down DC-DC converter. A 2 MHz oscillator turns on the internal top power switch at the beginning of each clock cycle. Current in the inductor then increases until the top switch comparator trips and turns off the top power switch. If the EN pin is low, the LTC3304A is in shutdown and in a low quiescent current state. When the EN pin is above its threshold, the switching regulator is enabled.
The MODE/SYNC pin sets the switching mode to pulse skip, forced continuous, or
Burst Mode. If an external 1.6 MHz to 2.4 MHz clock is connected to the
MODE/SYNC turret while the JP1 is set to the SKIP position, the switching
frequency sync to the external clock.
The LTC3304A operates in forced continuous mode while syncing to an external
clock. For more detailed information, refer to the LTC3304A data sheet.
ACCURATELY MEASURING OUTPUT RIPPLE OF THE LTC3304A
Figure 14. VOUT Ripple with C9 X2Y Capacitor
With the fast edge rates of the circuit, high frequency noise can be observed when measuring the output voltage with 1 MΩ terminated oscilloscope probes. To better view the output ripple with oscilloscopes of 400 MHz bandwidth and above, a 50 Ω coax cable connected as close to the output caps as possible should be used with the oscilloscope channel terminated to 50 Ω at the scope. This helps to reduce the noise coupling onto and displaying on the scope. The demo board is set up to solder an U.FL, RECEPT, ST SMD, 0 Hz to 6 GHz, 50 Ω connector (TP1) near the output cap C6. These pads can also be used to solder a coax cable or other oscilloscope probe connector if required.
The high frequency spikes are partially attributed to the inter-winding capacitance of the inductor and the voltage step is partially attributed to the inductance in the output capacitors. This can be reduced by choosing low ESL capacitors or adding small low ESL capacitors in parallel to the output capacitors as close to the inductor as possible. Figure 13 and Figure 14 show the output ripple using a 500 MHz scope, 50 Ω probe with an added low ESL X2Y capacitor added, C9, close to the inductor and GND return to the input capacitors to reduce the inductance of the return path and better filter the high frequency spikes.
EVALUATION BOARD SCHEMATIC
Figure 15. DC3203A Schematic Diagram
ORDERING INFORMATION
BILL OF MATERIALS
Table 2. DC3203A Bill of Materials
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and
circuit boards can discharge without detection. Although this product features
patented or proprietary protection circuitry, damage may occur on devices
subjected to high energy ESD. Therefore, proper ESD precautions should be
taken to avoid performance degradation or loss of functionality.
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References
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